* Make-common.in (CGEN_INCLUDE_DEPS): Add cgen-defs.h, cgen-engine.h.

	(CGEN_MAIN_SCM): Add rtx-funcs.scm.
	(cgen-arch): Pass $(mach) to cgen.sh.
	* cgen-engine.h (SEM_BRANCH_FINI): New arg pcvar, all uses updated.
	(SEM_BRANCH_INIT_EXTRACT): New macro.
	(SEM_BRANCH_INIT): Add taken_p.
	(TARGET_SEM_BRANCH_FINI): Provide default definition.
	(SEM_BRANCH_FINI): Use it.
	(SEM_INSN): Update.
	* cgen-run.c (sim_resume): Handle tracing of last insn.
	* cgen-scache.h (WITH_SCACHE): Define as 0 if not defined.
	* cgen-trace.c (current_abuf): New static global.
	(trace_insn_init): Initialize it.
	(trace_insn_fini): Use it.
	(trace_insn): Set it.
	* cgen.sh (arch case): Pass -m ${mach} to cgen.
	* genmloop.sh (@cpu@_emit_before): Only define if WITH_SCACHE_PBB.
	(@cpu@_emit_after): Ditto.
	(simple @cpu@_engine_run_full): New local `pc'.  Initialize semantic
	labels if WITH_SEM_SWITCH_FULL.
	* sim-model.c: Include bfd.h.
	(sim_model_init): New function.
	(sim_model_install): Record init fn.
	* sim-model.h (MACH): New member bfd_name.
	* sim-module.c (modules): Initialize model before scache.

1 files changed, 99 insertions, 34 deletions

diff --git a/sim/common/cgen-engine.h b/sim/common/cgen-engine.h
index 91b7766..5c64e6b 100644
--- a/sim/common/cgen-engine.h
+++ b/sim/common/cgen-engine.h
@@ -1,4 +1,4 @@
-/* Simulator header for the cgen engine.
+/* Engine header for Cpu tools GENerated simulators.
    Copyright (C) 1998 Free Software Foundation, Inc.
    Contributed by Cygnus Support.
 
@@ -18,10 +18,7 @@ You should have received a copy of the GNU General Public License along
 with this program; if not, write to the Free Software Foundation, Inc.,
 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
 
-/* This file must be included after eng.h and ${cpu}.h have been included.  */
-
-#ifndef CGEN_ENGINE_H
-#define CGEN_ENGINE_H
+/* This file must be included after eng.h and before ${cpu}.h.  */
 
 /* Semantic functions come in six versions on two axes:
    fast/full-featured, and using one of the simple/scache/compilation engines.
@@ -32,6 +29,43 @@ with this program; if not, write to the Free Software Foundation, Inc.,
 /* FIXME: --enable-sim-fast not implemented yet.  */
 /* FIXME: undecided how to handle WITH_SCACHE_PBB.  */
 
+#ifndef CGEN_ENGINE_H
+#define CGEN_ENGINE_H
+
+/* Instruction field support macros.  */
+
+#define EXTRACT_MSB0_INT(val, total, start, length) \
+(((INT) (val) << ((sizeof (INT) * 8) - (total) + (start))) \
+ >> ((sizeof (INT) * 8) - (length)))
+#define EXTRACT_MSB0_UINT(val, total, start, length) \
+(((UINT) (val) << ((sizeof (UINT) * 8) - (total) + (start))) \
+ >> ((sizeof (UINT) * 8) - (length)))
+
+#define EXTRACT_LSB0_INT(val, total, start, length) \
+(((INT) (val) << ((sizeof (INT) * 8) - (start) - (length))) \
+ >> ((sizeof (INT) * 8) - (length)))
+#define EXTRACT_LSB0_UINT(val, total, start, length) \
+(((UINT) (val) << ((sizeof (UINT) * 8) - (start) - (length))) \
+ >> ((sizeof (UINT) * 8) - (length)))
+
+#if CGEN_INSN_LSB0_P
+
+#define EXTRACT_INT(val, total, start, length) \
+  EXTRACT_LSB0_INT ((val), (total), (start), (length))
+#define EXTRACT_UINT(val, total, start, length) \
+  EXTRACT_LSB0_UINT ((val), (total), (start), (length))
+
+#else
+
+#define EXTRACT_INT(val, total, start, length) \
+  EXTRACT_MSB0_INT ((val), (total), (start), (length))
+#define EXTRACT_UINT(val, total, start, length) \
+  EXTRACT_MSB0_UINT ((val), (total), (start), (length))
+
+#endif
+
+/* union sem */
+
 /* Types of the machine generated extract and semantic fns.  */
 typedef void (EXTRACT_FN) (SIM_CPU *, PCADDR, insn_t, ARGBUF *);
 #if HAVE_PARALLEL_INSNS
@@ -91,7 +125,7 @@ do { \
   else \
     SEM_SET_FULL_CODE ((abuf), (idesc)); \
 } while (0)
-
+
 #define IDESC_CTI_P(idesc) \
      ((CGEN_ATTR_BOOLS (CGEN_INSN_ATTRS ((idesc)->opcode)) \
        & (CGEN_ATTR_MASK (CGEN_INSN_COND_CTI) \
@@ -104,8 +138,6 @@ do { \
 
 /* These are used so that we can compile two copies of the semantic code,
    one with full feature support and one without that runs fast(er).  */
-/* FIXME: Eventually delete extraction if not using scache.  */
-#define EX_FN_NAME(cpu,fn) XCONCAT3 (cpu,_ex_,fn)
 #define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_sem_,fn)
 #define SEMF_FN_NAME(cpu,fn) XCONCAT3 (cpu,_semf_,fn)
 
@@ -116,10 +148,15 @@ do { \
 /* semantics.c support */
 #define SEM_ARGBUF(sem_arg) (& (sem_arg) -> argbuf)
 #define SEM_INSN(sem_arg) shouldnt_be_used
-#define SEM_NEXT_VPC(sc, len) ((sc) + 1)
 
 #if WITH_SCACHE_PBB
 
+/* Return the scache pointer of the current insn.  */
+#define SEM_SEM_ARG(vpc, sc) (vpc)
+/* Return the virtual pc of the next insn to execute
+   (assuming this isn't a cti).  */
+#define SEM_NEXT_VPC(sem_arg, pc, len) ((sem_arg) + 1)
+
 /* Update the instruction counter.  */
 #define PBB_UPDATE_INSN_COUNT(cpu,sc) \
   (CPU_INSN_COUNT (cpu) += SEM_ARGBUF (sc) -> fields.chain.insn_count)
@@ -130,8 +167,7 @@ do { \
    address (e.g. j reg).  */
 #define SEM_BRANCH_UNCACHEABLE ((SEM_PC *) 1)
 
-/* ??? Only necessary if SEM_BRANCH_VIA_CACHE will be used,
-   but for simplicity it's done this way.  */
+/* Initialize next-pbb link for SEM_BRANCH_VIA_CACHE.  */
 #define SEM_BRANCH_INIT_EXTRACT(abuf) \
 do { (abuf)->fields.cti.addr_cache = 0; } while (0)
 
@@ -144,21 +180,17 @@ do { (abuf)->fields.cti.addr_cache = 0; } while (0)
    generated by genmloop.sh.  It exists so generated semantic code needn't
    care whether it's being put in a switch or in a function.  */
 #ifdef SEM_IN_SWITCH
-/* Do not append a `;' to invocations of this.
-   ??? Unnecessary here, but for consistency with ..._INIT.  */
-#define SEM_BRANCH_FINI \
-{ \
+#define SEM_BRANCH_FINI(pcvar) \
+do { \
   pbb_br_npc = npc; \
   pbb_br_npc_ptr = npc_ptr; \
-}
+} while (0)
 #else /* 1 semantic function per instruction */
-/* Do not append a `;' to invocations of this.
-   ??? Unnecessary here, but for consistency with ..._INIT.  */
-#define SEM_BRANCH_FINI \
-{ \
+#define SEM_BRANCH_FINI(pcvar) \
+do { \
   CPU_PBB_BR_NPC (current_cpu) = npc; \
   CPU_PBB_BR_NPC_PTR (current_cpu) = npc_ptr; \
-}
+} while (0)
 #endif
 
 /* Return address of cached branch address value.  */
@@ -177,50 +209,83 @@ do { \
 
 #else /* ! WITH_SCACHE_PBB */
 
-#define SEM_BRANCH_INIT
-#define SEM_BRANCH_FINI
+#define SEM_SEM_ARG(vpc, sc) (sc)
+#define SEM_NEXT_VPC(sem_arg, pc, len) ((pc) + (len))
+
+#define SEM_BRANCH_INIT_EXTRACT(abuf) do { } while (0)
+
+#define SEM_BRANCH_INIT \
+  int taken_p = 0;
+#ifndef TARGET_SEM_BRANCH_FINI(pcvar, taken_p)
+#define TARGET_SEM_BRANCH_FINI(pcvar, taken_p)
+#endif
+#define SEM_BRANCH_FINI(pcvar) \
+  do { TARGET_SEM_BRANCH_FINI (pcvar, taken_p); } while (0)
 
 #define SEM_BRANCH_ADDR_CACHE(sem_arg) shouldnt_be_used
 #define SEM_BRANCH_VIA_CACHE(cpu, sc, newval, pcvar, cachevar) \
 do { \
   (pcvar) = (newval); \
+  taken_p = 1; \
 } while (0)
 #define SEM_BRANCH_VIA_ADDR(cpu, sc, newval, pcvar) \
 do { \
   (pcvar) = (newval); \
+  taken_p = 1; \
 } while (0)
 
 #endif /* ! WITH_SCACHE_PBB */
 
-/* Return address a branch insn will branch to.
-   This is only used during tracing.  */
-#define SEM_NEW_PC_ADDR(new_pc) (new_pc)
-
 #else /* ! WITH_SCACHE */
 
 #define CIA_ADDR(cia) (cia)
 
 /* semantics.c support */
 #define SEM_ARGBUF(sem_arg) (sem_arg)
-#define SEM_INSN(sem_arg) (SEM_ARGBUF (sem_arg) -> insn)
-/* FIXME:wip */
-#define SEM_NEXT_VPC(abuf, len) ((abuf) -> addr + (abuf) -> length)
+#define SEM_INSN(sem_arg) (SEM_ARGBUF (sem_arg) -> base_insn)
 
-#define SEM_BRANCH_INIT
-#define SEM_BRANCH_FINI
+#define SEM_SEM_ARG(vpc, sc) (sc)
+#define SEM_NEXT_VPC(sem_arg, pc, len) ((pc) + (len))
+
+#define SEM_BRANCH_INIT \
+  int taken_p = 0;
+#ifndef TARGET_SEM_BRANCH_FINI
+#define TARGET_SEM_BRANCH_FINI(pcvar, taken_p)
+#endif
+#define SEM_BRANCH_FINI(pcvar) \
+  do { TARGET_SEM_BRANCH_FINI (pcvar, taken_p); } while (0)
 
 #define SEM_BRANCH_ADDR_CACHE(sem_arg) shouldnt_be_used
 #define SEM_BRANCH_VIA_CACHE(cpu, abuf, newval, pcvar, cachevar) \
 do { \
   (pcvar) = (newval); \
+  taken_p = 1; \
 } while (0)
 #define SEM_BRANCH_VIA_ADDR(cpu, abuf, newval, pcvar) \
 do { \
   (pcvar) = (newval); \
+  taken_p = 1; \
 } while (0)
 
-#define SEM_NEW_PC_ADDR(new_pc) (new_pc)
-
 #endif /* ! WITH_SCACHE */
+
+/* Tracing/profiling.  */
+
+/* Return non-zero if a before/after handler is needed.
+   When tracing/profiling a selected range there's no need to slow
+   down simulation of the other insns (except to get more accurate data!).
+
+   ??? May wish to profile all insns if doing insn tracing, or to
+   get more accurate cycle data.
+
+   First test ANY_P so we avoid a potentially expensive HIT_P call
+   [if there are lots of address ranges].  */
+
+#define PC_IN_TRACE_RANGE_P(cpu, pc) \
+  (TRACE_ANY_P (cpu) \
+   && ADDR_RANGE_HIT_P (TRACE_RANGE (CPU_TRACE_DATA (cpu)), (pc)))
+#define PC_IN_PROFILE_RANGE_P(cpu, pc) \
+  (PROFILE_ANY_P (cpu) \
+   && ADDR_RANGE_HIT_P (PROFILE_RANGE (CPU_PROFILE_DATA (cpu)), (pc)))
 
 #endif /* CGEN_ENGINE_H */