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authorPeter Gavin <pgavin@gmail.com>2017-12-09 05:57:25 +0900
committerStafford Horne <shorne@gmail.com>2017-12-12 23:41:43 +0900
commit07b95864f35f19636e2a95eaf3083a8b18ac7cda (patch)
tree5ebfa4d1d728e6625c033a9c8cf90f3e45468ded /sim/common/cgen-accfp.c
parent638d913757609367eea219d00296a0a3d45010c2 (diff)
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sim: cgen: add remainder functions (needed for OR1K lf.rem.[sd])
* sim/common/ChangeLog: 2017-12-12 Peter Gavin <pgavin@gmail.com> Stafford Horne <shorne@gmail.com> * cgen-accfp.c (remsf, remdf): New function. (cgen_init_accurate_fpu): Add remsf and remdf. * cgen-fpu.h (cgen_fp_ops): Add remsf, remdf, remxf and remtf. * sim-fpu.c (sim_fpu_rem): New function. * sim-fpu.h (sim_fpu_status_invalid_irx): New enum. (sim_fpu_rem): New function. (sim_fpu_print_status): Add case for sim_fpu_status_invalid_irx.
Diffstat (limited to 'sim/common/cgen-accfp.c')
-rw-r--r--sim/common/cgen-accfp.c40
1 files changed, 40 insertions, 0 deletions
diff --git a/sim/common/cgen-accfp.c b/sim/common/cgen-accfp.c
index afbca6d..5d600c6 100644
--- a/sim/common/cgen-accfp.c
+++ b/sim/common/cgen-accfp.c
@@ -93,6 +93,25 @@ divsf (CGEN_FPU* fpu, SF x, SF y)
}
static SF
+remsf (CGEN_FPU* fpu, SF x, SF y)
+{
+ sim_fpu op1;
+ sim_fpu op2;
+ sim_fpu ans;
+ unsigned32 res;
+ sim_fpu_status status;
+
+ sim_fpu_32to (&op1, x);
+ sim_fpu_32to (&op2, y);
+ status = sim_fpu_rem (&ans, &op1, &op2);
+ if (status != 0)
+ (*fpu->ops->error) (fpu, status);
+ sim_fpu_to32 (&res, &ans);
+
+ return res;
+}
+
+static SF
negsf (CGEN_FPU* fpu, SF x)
{
sim_fpu op1;
@@ -453,6 +472,25 @@ divdf (CGEN_FPU* fpu, DF x, DF y)
}
static DF
+remdf (CGEN_FPU* fpu, DF x, DF y)
+{
+ sim_fpu op1;
+ sim_fpu op2;
+ sim_fpu ans;
+ unsigned64 res;
+ sim_fpu_status status;
+
+ sim_fpu_64to (&op1, x);
+ sim_fpu_64to (&op2, y);
+ status = sim_fpu_rem (&ans, &op1, &op2);
+ if (status != 0)
+ (*fpu->ops->error) (fpu, status);
+ sim_fpu_to64(&res, &ans);
+
+ return res;
+}
+
+static DF
negdf (CGEN_FPU* fpu, DF x)
{
sim_fpu op1;
@@ -664,6 +702,7 @@ cgen_init_accurate_fpu (SIM_CPU* cpu, CGEN_FPU* fpu, CGEN_FPU_ERROR_FN* error)
o->subsf = subsf;
o->mulsf = mulsf;
o->divsf = divsf;
+ o->remsf = remsf;
o->negsf = negsf;
o->abssf = abssf;
o->sqrtsf = sqrtsf;
@@ -682,6 +721,7 @@ cgen_init_accurate_fpu (SIM_CPU* cpu, CGEN_FPU* fpu, CGEN_FPU_ERROR_FN* error)
o->subdf = subdf;
o->muldf = muldf;
o->divdf = divdf;
+ o->remdf = remdf;
o->negdf = negdf;
o->absdf = absdf;
o->sqrtdf = sqrtdf;