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authorMike Frysinger <vapier@gentoo.org>2011-03-15 20:44:11 +0000
committerMike Frysinger <vapier@gentoo.org>2011-03-15 20:44:11 +0000
commit990d19fd6d925da5856de50fd84d8656e762b83c (patch)
tree78a21bfb29c4d0d4f10900714b098fb437695125 /sim/bfin/machs.c
parent227d265839dcb5f90383a23e36dc7d0a5df62075 (diff)
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sim: bfin: fix brace style
Diffstat (limited to 'sim/bfin/machs.c')
-rw-r--r--sim/bfin/machs.c132
1 files changed, 88 insertions, 44 deletions
diff --git a/sim/bfin/machs.c b/sim/bfin/machs.c
index e60e8c9..8e8f49d 100644
--- a/sim/bfin/machs.c
+++ b/sim/bfin/machs.c
@@ -94,7 +94,8 @@ static const struct bfin_dmac_layout bf000_dmac[] = {};
#define bf50x_chipid 0x2800
#define bf504_chipid bf50x_chipid
#define bf506_chipid bf50x_chipid
-static const struct bfin_memory_layout bf50x_mem[] = {
+static const struct bfin_memory_layout bf50x_mem[] =
+{
LAYOUT (0xFFC00700, 0x50, read_write), /* PORTF stub */
LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */
LAYOUT (0xFFC00900, 0x60, read_write), /* SPORT1 stub */
@@ -110,7 +111,8 @@ static const struct bfin_memory_layout bf50x_mem[] = {
};
#define bf504_mem bf50x_mem
#define bf506_mem bf50x_mem
-static const struct bfin_dev_layout bf50x_dev[] = {
+static const struct bfin_dev_layout bf50x_dev[] =
+{
DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"),
DEVICE (0xFFC00400, BFIN_MMR_UART2_SIZE, "bfin_uart2@0"),
DEVICE (0xFFC00500, BFIN_MMR_SPI_SIZE, "bfin_spi@0"),
@@ -130,7 +132,8 @@ static const struct bfin_dev_layout bf50x_dev[] = {
};
#define bf504_dev bf50x_dev
#define bf506_dev bf50x_dev
-static const struct bfin_dmac_layout bf50x_dmac[] = {
+static const struct bfin_dmac_layout bf50x_dmac[] =
+{
{ BFIN_MMR_DMAC0_BASE, 12, },
};
#define bf504_dmac bf50x_dmac
@@ -141,7 +144,8 @@ static const struct bfin_dmac_layout bf50x_dmac[] = {
#define bf514_chipid bf51x_chipid
#define bf516_chipid bf51x_chipid
#define bf518_chipid bf51x_chipid
-static const struct bfin_memory_layout bf51x_mem[] = {
+static const struct bfin_memory_layout bf51x_mem[] =
+{
LAYOUT (0xFFC00680, 0xC, read_write), /* TIMER stub */
LAYOUT (0xFFC00700, 0x50, read_write), /* PORTF stub */
LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */
@@ -162,7 +166,8 @@ static const struct bfin_memory_layout bf51x_mem[] = {
#define bf514_mem bf51x_mem
#define bf516_mem bf51x_mem
#define bf518_mem bf51x_mem
-static const struct bfin_dev_layout bf512_dev[] = {
+static const struct bfin_dev_layout bf512_dev[] =
+{
DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"),
DEVICE (0xFFC00300, BFIN_MMR_RTC_SIZE, "bfin_rtc"),
DEVICE (0xFFC00400, BFIN_MMR_UART_SIZE, "bfin_uart@0"),
@@ -184,7 +189,8 @@ static const struct bfin_dev_layout bf512_dev[] = {
DEVICE (0xFFC03600, BFIN_MMR_OTP_SIZE, "bfin_otp"),
};
#define bf514_dev bf512_dev
-static const struct bfin_dev_layout bf516_dev[] = {
+static const struct bfin_dev_layout bf516_dev[] =
+{
DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"),
DEVICE (0xFFC00300, BFIN_MMR_RTC_SIZE, "bfin_rtc"),
DEVICE (0xFFC00400, BFIN_MMR_UART_SIZE, "bfin_uart@0"),
@@ -219,7 +225,8 @@ static const struct bfin_dev_layout bf516_dev[] = {
#define bf525_chipid bf523_chipid
#define bf526_chipid bf522_chipid
#define bf527_chipid bf523_chipid
-static const struct bfin_memory_layout bf52x_mem[] = {
+static const struct bfin_memory_layout bf52x_mem[] =
+{
LAYOUT (0xFFC00680, 0xC, read_write), /* TIMER stub */
LAYOUT (0xFFC00700, 0x50, read_write), /* PORTF stub */
LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */
@@ -242,7 +249,8 @@ static const struct bfin_memory_layout bf52x_mem[] = {
#define bf525_mem bf52x_mem
#define bf526_mem bf52x_mem
#define bf527_mem bf52x_mem
-static const struct bfin_dev_layout bf522_dev[] = {
+static const struct bfin_dev_layout bf522_dev[] =
+{
DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"),
DEVICE (0xFFC00300, BFIN_MMR_RTC_SIZE, "bfin_rtc"),
DEVICE (0xFFC00400, BFIN_MMR_UART_SIZE, "bfin_uart@0"),
@@ -266,7 +274,8 @@ static const struct bfin_dev_layout bf522_dev[] = {
#define bf523_dev bf522_dev
#define bf524_dev bf522_dev
#define bf525_dev bf522_dev
-static const struct bfin_dev_layout bf526_dev[] = {
+static const struct bfin_dev_layout bf526_dev[] =
+{
DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"),
DEVICE (0xFFC00300, BFIN_MMR_RTC_SIZE, "bfin_rtc"),
DEVICE (0xFFC00400, BFIN_MMR_UART_SIZE, "bfin_uart@0"),
@@ -300,7 +309,8 @@ static const struct bfin_dev_layout bf526_dev[] = {
#define bf531_chipid 0x27a5
#define bf532_chipid bf531_chipid
#define bf533_chipid bf531_chipid
-static const struct bfin_memory_layout bf531_mem[] = {
+static const struct bfin_memory_layout bf531_mem[] =
+{
LAYOUT (0xFFC00640, 0xC, read_write), /* TIMER stub */
LAYOUT (0xFFC00700, 0x50, read_write), /* GPIO stub */
LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */
@@ -309,7 +319,8 @@ static const struct bfin_memory_layout bf531_mem[] = {
LAYOUT (0xFFA08000, 0x4000, read_write_exec), /* Inst B [1] */
LAYOUT (0xFFA10000, 0x4000, read_write_exec), /* Inst Cache [1] */
};
-static const struct bfin_memory_layout bf532_mem[] = {
+static const struct bfin_memory_layout bf532_mem[] =
+{
LAYOUT (0xFFC00640, 0xC, read_write), /* TIMER stub */
LAYOUT (0xFFC00700, 0x50, read_write), /* GPIO stub */
LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */
@@ -320,7 +331,8 @@ static const struct bfin_memory_layout bf532_mem[] = {
LAYOUT (0xFFA0C000, 0x4000, read_write_exec), /* Inst C [1] */
LAYOUT (0xFFA10000, 0x4000, read_write_exec), /* Inst Cache [1] */
};
-static const struct bfin_memory_layout bf533_mem[] = {
+static const struct bfin_memory_layout bf533_mem[] =
+{
LAYOUT (0xFFC00640, 0xC, read_write), /* TIMER stub */
LAYOUT (0xFFC00700, 0x50, read_write), /* GPIO stub */
LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */
@@ -334,7 +346,8 @@ static const struct bfin_memory_layout bf533_mem[] = {
LAYOUT (0xFFA0C000, 0x4000, read_write_exec), /* Inst C [1] */
LAYOUT (0xFFA10000, 0x4000, read_write_exec), /* Inst Cache [1] */
};
-static const struct bfin_dev_layout bf533_dev[] = {
+static const struct bfin_dev_layout bf533_dev[] =
+{
DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"),
DEVICE (0xFFC00300, BFIN_MMR_RTC_SIZE, "bfin_rtc"),
DEVICE (0xFFC00400, BFIN_MMR_UART_SIZE, "bfin_uart@0"),
@@ -348,7 +361,8 @@ static const struct bfin_dev_layout bf533_dev[] = {
};
#define bf531_dev bf533_dev
#define bf532_dev bf533_dev
-static const struct bfin_dmac_layout bf533_dmac[] = {
+static const struct bfin_dmac_layout bf533_dmac[] =
+{
{ BFIN_MMR_DMAC0_BASE, 8, },
};
#define bf531_dmac bf533_dmac
@@ -357,7 +371,8 @@ static const struct bfin_dmac_layout bf533_dmac[] = {
#define bf534_chipid 0x27c6
#define bf536_chipid 0x27c8
#define bf537_chipid bf536_chipid
-static const struct bfin_memory_layout bf534_mem[] = {
+static const struct bfin_memory_layout bf534_mem[] =
+{
LAYOUT (0xFFC00680, 0xC, read_write), /* TIMER stub */
LAYOUT (0xFFC00700, 0x50, read_write), /* PORTF stub */
LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */
@@ -373,7 +388,8 @@ static const struct bfin_memory_layout bf534_mem[] = {
LAYOUT (0xFFA08000, 0x4000, read_write_exec), /* Inst B [1] */
LAYOUT (0xFFA10000, 0x4000, read_write_exec), /* Inst Cache [1] */
};
-static const struct bfin_memory_layout bf536_mem[] = {
+static const struct bfin_memory_layout bf536_mem[] =
+{
LAYOUT (0xFFC00680, 0xC, read_write), /* TIMER stub */
LAYOUT (0xFFC00700, 0x50, read_write), /* PORTF stub */
LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */
@@ -387,7 +403,8 @@ static const struct bfin_memory_layout bf536_mem[] = {
LAYOUT (0xFFA08000, 0x4000, read_write_exec), /* Inst B [1] */
LAYOUT (0xFFA10000, 0x4000, read_write_exec), /* Inst Cache [1] */
};
-static const struct bfin_memory_layout bf537_mem[] = {
+static const struct bfin_memory_layout bf537_mem[] =
+{
LAYOUT (0xFFC00680, 0xC, read_write), /* TIMER stub */
LAYOUT (0xFFC00700, 0x50, read_write), /* PORTF stub */
LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */
@@ -403,7 +420,8 @@ static const struct bfin_memory_layout bf537_mem[] = {
LAYOUT (0xFFA08000, 0x4000, read_write_exec), /* Inst B [1] */
LAYOUT (0xFFA10000, 0x4000, read_write_exec), /* Inst Cache [1] */
};
-static const struct bfin_dev_layout bf534_dev[] = {
+static const struct bfin_dev_layout bf534_dev[] =
+{
DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"),
DEVICE (0xFFC00300, BFIN_MMR_RTC_SIZE, "bfin_rtc"),
DEVICE (0xFFC00400, BFIN_MMR_UART_SIZE, "bfin_uart@0"),
@@ -422,7 +440,8 @@ static const struct bfin_dev_layout bf534_dev[] = {
DEVICE (0xFFC01400, BFIN_MMR_TWI_SIZE, "bfin_twi@0"),
DEVICE (0xFFC02000, BFIN_MMR_UART_SIZE, "bfin_uart@1"),
};
-static const struct bfin_dev_layout bf537_dev[] = {
+static const struct bfin_dev_layout bf537_dev[] =
+{
DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"),
DEVICE (0xFFC00300, BFIN_MMR_RTC_SIZE, "bfin_rtc"),
DEVICE (0xFFC00400, BFIN_MMR_UART_SIZE, "bfin_uart@0"),
@@ -450,7 +469,8 @@ static const struct bfin_dev_layout bf537_dev[] = {
#define bf538_chipid 0x27c4
#define bf539_chipid bf538_chipid
-static const struct bfin_memory_layout bf538_mem[] = {
+static const struct bfin_memory_layout bf538_mem[] =
+{
LAYOUT (0xFFC00700, 0x50, read_write), /* PORTF stub */
LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */
LAYOUT (0xFFC00900, 0x60, read_write), /* SPORT1 stub */
@@ -467,7 +487,8 @@ static const struct bfin_memory_layout bf538_mem[] = {
LAYOUT (0xFFA10000, 0x4000, read_write_exec), /* Inst Cache [1] */
};
#define bf539_mem bf538_mem
-static const struct bfin_dev_layout bf538_dev[] = {
+static const struct bfin_dev_layout bf538_dev[] =
+{
DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"),
DEVICE (0xFFC00300, BFIN_MMR_RTC_SIZE, "bfin_rtc"),
DEVICE (0xFFC00400, BFIN_MMR_UART_SIZE, "bfin_uart@0"),
@@ -486,7 +507,8 @@ static const struct bfin_dev_layout bf538_dev[] = {
_DEVICE (0xFFC02400, BFIN_MMR_SPI_SIZE, "bfin_spi@2", 1),
};
#define bf539_dev bf538_dev
-static const struct bfin_dmac_layout bf538_dmac[] = {
+static const struct bfin_dmac_layout bf538_dmac[] =
+{
{ BFIN_MMR_DMAC0_BASE, 8, },
{ BFIN_MMR_DMAC1_BASE, 12, },
};
@@ -498,7 +520,8 @@ static const struct bfin_dmac_layout bf538_dmac[] = {
#define bf547_chipid bf54x_chipid
#define bf548_chipid bf54x_chipid
#define bf549_chipid bf54x_chipid
-static const struct bfin_memory_layout bf54x_mem[] = {
+static const struct bfin_memory_layout bf54x_mem[] =
+{
LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub XXX: not on BF542/4 */
LAYOUT (0xFFC00900, 0x60, read_write), /* SPORT1 stub */
LAYOUT (0xFFC01400, 0x200, read_write), /* PORT/GPIO stub */
@@ -521,7 +544,8 @@ static const struct bfin_memory_layout bf54x_mem[] = {
#define bf547_mem bf54x_mem
#define bf548_mem bf54x_mem
#define bf549_mem bf54x_mem
-static const struct bfin_dev_layout bf542_dev[] = {
+static const struct bfin_dev_layout bf542_dev[] =
+{
DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"),
DEVICE (0xFFC00300, BFIN_MMR_RTC_SIZE, "bfin_rtc"),
DEVICE (0xFFC00400, BFIN_MMR_UART2_SIZE, "bfin_uart2@0"),
@@ -546,7 +570,8 @@ static const struct bfin_dev_layout bf542_dev[] = {
DEVICE (0xFFC03B00, BFIN_MMR_NFC_SIZE, "bfin_nfc"),
DEVICE (0xFFC04300, BFIN_MMR_OTP_SIZE, "bfin_otp"),
};
-static const struct bfin_dev_layout bf544_dev[] = {
+static const struct bfin_dev_layout bf544_dev[] =
+{
DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"),
DEVICE (0xFFC00300, BFIN_MMR_RTC_SIZE, "bfin_rtc"),
DEVICE (0xFFC00400, BFIN_MMR_UART2_SIZE, "bfin_uart2@0"),
@@ -576,7 +601,8 @@ static const struct bfin_dev_layout bf544_dev[] = {
DEVICE (0xFFC03B00, BFIN_MMR_NFC_SIZE, "bfin_nfc"),
DEVICE (0xFFC04300, BFIN_MMR_OTP_SIZE, "bfin_otp"),
};
-static const struct bfin_dev_layout bf547_dev[] = {
+static const struct bfin_dev_layout bf547_dev[] =
+{
DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"),
DEVICE (0xFFC00300, BFIN_MMR_RTC_SIZE, "bfin_rtc"),
DEVICE (0xFFC00400, BFIN_MMR_UART2_SIZE, "bfin_uart2@0"),
@@ -608,7 +634,8 @@ static const struct bfin_dev_layout bf547_dev[] = {
};
#define bf548_dev bf547_dev
#define bf549_dev bf547_dev
-static const struct bfin_dmac_layout bf54x_dmac[] = {
+static const struct bfin_dmac_layout bf54x_dmac[] =
+{
{ BFIN_MMR_DMAC0_BASE, 12, },
{ BFIN_MMR_DMAC1_BASE, 12, },
};
@@ -620,7 +647,8 @@ static const struct bfin_dmac_layout bf54x_dmac[] = {
/* This is only Core A of course ... */
#define bf561_chipid 0x27bb
-static const struct bfin_memory_layout bf561_mem[] = {
+static const struct bfin_memory_layout bf561_mem[] =
+{
LAYOUT (0xFFC00700, 0x50, read_write), /* GPIO0 stub */
LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */
LAYOUT (0xFFC00900, 0x60, read_write), /* SPORT1 stub */
@@ -634,7 +662,8 @@ static const struct bfin_memory_layout bf561_mem[] = {
LAYOUT (0xFFA00000, 0x4000, read_write_exec), /* Inst A [1] */
LAYOUT (0xFFA10000, 0x4000, read_write_exec), /* Inst Cache [1] */
};
-static const struct bfin_dev_layout bf561_dev[] = {
+static const struct bfin_dev_layout bf561_dev[] =
+{
DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"),
DEVICE (0xFFC00400, BFIN_MMR_UART_SIZE, "bfin_uart@0"),
DEVICE (0xFFC00500, BFIN_MMR_SPI_SIZE, "bfin_spi@0"),
@@ -656,14 +685,16 @@ static const struct bfin_dev_layout bf561_dev[] = {
DEVICE (0xFFC01620, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@10"),
DEVICE (0xFFC01630, BFIN_MMR_GPTIMER_SIZE, "bfin_gptimer@11"),
};
-static const struct bfin_dmac_layout bf561_dmac[] = {
+static const struct bfin_dmac_layout bf561_dmac[] =
+{
{ BFIN_MMR_DMAC0_BASE, 12, },
{ BFIN_MMR_DMAC1_BASE, 12, },
/* XXX: IMDMA: { 0xFFC01800, 4, }, */
};
#define bf592_chipid 0x20cb
-static const struct bfin_memory_layout bf592_mem[] = {
+static const struct bfin_memory_layout bf592_mem[] =
+{
LAYOUT (0xFFC00700, 0x50, read_write), /* GPIO0 stub */
LAYOUT (0xFFC00800, 0x60, read_write), /* SPORT0 stub */
LAYOUT (0xFFC00900, 0x60, read_write), /* SPORT1 stub */
@@ -672,7 +703,8 @@ static const struct bfin_memory_layout bf592_mem[] = {
LAYOUT (0xFFA00000, 0x4000, read_write_exec), /* Inst A [1] */
LAYOUT (0xFFA04000, 0x4000, read_write_exec), /* Inst B [1] */
};
-static const struct bfin_dev_layout bf592_dev[] = {
+static const struct bfin_dev_layout bf592_dev[] =
+{
DEVICE (0xFFC00200, BFIN_MMR_WDOG_SIZE, "bfin_wdog@0"),
DEVICE (0xFFC00400, BFIN_MMR_UART_SIZE, "bfin_uart@0"),
DEVICE (0xFFC00500, BFIN_MMR_SPI_SIZE, "bfin_spi@0"),
@@ -683,7 +715,8 @@ static const struct bfin_dev_layout bf592_dev[] = {
DEVICE (0xFFC01300, BFIN_MMR_SPI_SIZE, "bfin_spi@1"),
DEVICE (0xFFC01400, BFIN_MMR_TWI_SIZE, "bfin_twi@0"),
};
-static const struct bfin_dmac_layout bf592_dmac[] = {
+static const struct bfin_dmac_layout bf592_dmac[] =
+{
/* XXX: there are only 9 channels, but mdma code below assumes that they
start right after the dma channels ... */
{ BFIN_MMR_DMAC0_BASE, 12, },
@@ -704,7 +737,8 @@ static const struct bfin_model_data bfin_model_data[] =
#define CORE_DEVICE(dev, DEV) \
DEVICE (BFIN_COREMMR_##DEV##_BASE, BFIN_COREMMR_##DEV##_SIZE, "bfin_"#dev)
-static const struct bfin_dev_layout bfin_core_dev[] = {
+static const struct bfin_dev_layout bfin_core_dev[] =
+{
CORE_DEVICE (cec, CEC),
CORE_DEVICE (ctimer, CTIMER),
CORE_DEVICE (evt, EVT),
@@ -844,28 +878,33 @@ struct bfrom {
sirev, bfrom_bf##rom##_0_##sirev, }
#define BFROM(rom, sirev, alias_len) BFROMA (0xef000000, rom, sirev, alias_len)
#define BFROM_STUB { 0, 0, 0, 0, NULL, }
-static const struct bfrom bf50x_roms[] = {
+static const struct bfrom bf50x_roms[] =
+{
BFROM (50x, 0, 0x1000000),
BFROM_STUB,
};
-static const struct bfrom bf51x_roms[] = {
+static const struct bfrom bf51x_roms[] =
+{
BFROM (51x, 2, 0x1000000),
BFROM (51x, 1, 0x1000000),
BFROM (51x, 0, 0x1000000),
BFROM_STUB,
};
-static const struct bfrom bf526_roms[] = {
+static const struct bfrom bf526_roms[] =
+{
BFROM (526, 1, 0x1000000),
BFROM (526, 0, 0x1000000),
BFROM_STUB,
};
-static const struct bfrom bf527_roms[] = {
+static const struct bfrom bf527_roms[] =
+{
BFROM (527, 2, 0x1000000),
BFROM (527, 1, 0x1000000),
BFROM (527, 0, 0x1000000),
BFROM_STUB,
};
-static const struct bfrom bf533_roms[] = {
+static const struct bfrom bf533_roms[] =
+{
BFROM (533, 6, 0x1000000),
BFROM (533, 5, 0x1000000),
BFROM (533, 4, 0x1000000),
@@ -874,14 +913,16 @@ static const struct bfrom bf533_roms[] = {
BFROM (533, 1, 0x1000000),
BFROM_STUB,
};
-static const struct bfrom bf537_roms[] = {
+static const struct bfrom bf537_roms[] =
+{
BFROM (537, 3, 0x100000),
BFROM (537, 2, 0x100000),
BFROM (537, 1, 0x100000),
BFROM (537, 0, 0x100000),
BFROM_STUB,
};
-static const struct bfrom bf538_roms[] = {
+static const struct bfrom bf538_roms[] =
+{
BFROM (538, 5, 0x1000000),
BFROM (538, 4, 0x1000000),
BFROM (538, 3, 0x1000000),
@@ -890,7 +931,8 @@ static const struct bfrom bf538_roms[] = {
BFROM (538, 0, 0x1000000),
BFROM_STUB,
};
-static const struct bfrom bf54x_roms[] = {
+static const struct bfrom bf54x_roms[] =
+{
BFROM (54x, 2, 0),
BFROM (54x, 1, 0),
BFROM (54x, 0, 0),
@@ -899,12 +941,14 @@ static const struct bfrom bf54x_roms[] = {
BFROMA (0xffa14000, 54x_l1, 0, 0),
BFROM_STUB,
};
-static const struct bfrom bf561_roms[] = {
+static const struct bfrom bf561_roms[] =
+{
/* XXX: No idea what the actual wrap limit is here. */
BFROM (561, 5, 0),
BFROM_STUB,
};
-static const struct bfrom bf59x_roms[] = {
+static const struct bfrom bf59x_roms[] =
+{
BFROM (59x, 1, 0x1000000),
BFROM (59x, 0, 0x1000000),
BFROMA (0xffa10000, 59x_l1, 1, 0),