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| author | Mike Frysinger <vapier@gentoo.org> | 2015-06-11 18:28:25 +0800 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2015-06-12 06:34:20 -0400 |
| commit | bb11f3ed2bd9eeddca84cc3a80c3643ddae517f3 (patch) | |
| tree | 12dba53f4b4234217584f24d345980060c93271a /sim/bfin/interp.c | |
| parent | 29bc024d07fe480cd37f36097f23d5585b15e71c (diff) | |
| download | gdb-bb11f3ed2bd9eeddca84cc3a80c3643ddae517f3.zip gdb-bb11f3ed2bd9eeddca84cc3a80c3643ddae517f3.tar.gz gdb-bb11f3ed2bd9eeddca84cc3a80c3643ddae517f3.tar.bz2 | |
sim: trace: add common macros for logging info
The Blackfin port had some TRACE_xxx macros for easily logging trace data.
Use these as a base for common ones that have a simple form and match the
existing sets of helper macros.
Diffstat (limited to 'sim/bfin/interp.c')
| -rw-r--r-- | sim/bfin/interp.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/sim/bfin/interp.c b/sim/bfin/interp.c index 91a5919..bed7564 100644 --- a/sim/bfin/interp.c +++ b/sim/bfin/interp.c @@ -132,7 +132,7 @@ syscall_read_mem (host_callback *cb, struct cb_syscall *sc, SIM_DESC sd = (SIM_DESC) sc->p1; SIM_CPU *cpu = (SIM_CPU *) sc->p2; - MAYBE_TRACE (CORE, cpu, "DBUS FETCH (syscall) %i bytes @ 0x%08lx", bytes, taddr); + TRACE_CORE (cpu, "DBUS FETCH (syscall) %i bytes @ 0x%08lx", bytes, taddr); return sim_core_read_buffer (sd, cpu, read_map, buf, taddr, bytes); } @@ -144,7 +144,7 @@ syscall_write_mem (host_callback *cb, struct cb_syscall *sc, SIM_DESC sd = (SIM_DESC) sc->p1; SIM_CPU *cpu = (SIM_CPU *) sc->p2; - MAYBE_TRACE (CORE, cpu, "DBUS STORE (syscall) %i bytes @ 0x%08lx", bytes, taddr); + TRACE_CORE (cpu, "DBUS STORE (syscall) %i bytes @ 0x%08lx", bytes, taddr); return sim_core_write_buffer (sd, cpu, write_map, buf, taddr, bytes); } |