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author | Mike Frysinger <vapier@gentoo.org> | 2011-03-06 00:20:21 +0000 |
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committer | Mike Frysinger <vapier@gentoo.org> | 2011-03-06 00:20:21 +0000 |
commit | ef016f835f292f01f065412fcfd84c50bfff1fea (patch) | |
tree | fe72facf7bcdc58af74f3a37d30f0f25d501f6a0 /sim/bfin/dv-bfin_emac.h | |
parent | 7dcf22fd41de725f3280c80a1274bcef309d6891 (diff) | |
download | gdb-ef016f835f292f01f065412fcfd84c50bfff1fea.zip gdb-ef016f835f292f01f065412fcfd84c50bfff1fea.tar.gz gdb-ef016f835f292f01f065412fcfd84c50bfff1fea.tar.bz2 |
sim: bfin: new port
This can boot Das U-Boot and a Linux kernel. It also supports Linux
userspace FLAT and FDPIC (dynamic and static) ELFs.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'sim/bfin/dv-bfin_emac.h')
-rw-r--r-- | sim/bfin/dv-bfin_emac.h | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/sim/bfin/dv-bfin_emac.h b/sim/bfin/dv-bfin_emac.h new file mode 100644 index 0000000..2522292 --- /dev/null +++ b/sim/bfin/dv-bfin_emac.h @@ -0,0 +1,61 @@ +/* Blackfin Ethernet Media Access Controller (EMAC) model. + + Copyright (C) 2010-2011 Free Software Foundation, Inc. + Contributed by Analog Devices, Inc. + + This file is part of simulators. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see <http://www.gnu.org/licenses/>. */ + +#ifndef DV_BFIN_EMAC_H +#define DV_BFIN_EMAC_H + +#define BFIN_MMR_EMAC_BASE 0xFFC03000 +#define BFIN_MMR_EMAC_SIZE 0x200 + +/* EMAC_OPMODE Masks */ +#define RE (1 << 0) +#define ASTP (1 << 1) +#define PR (1 << 7) +#define TE (1 << 16) + +/* EMAC_STAADD Masks */ +#define STABUSY (1 << 0) +#define STAOP (1 << 1) +#define STADISPRE (1 << 2) +#define STAIE (1 << 3) +#define REGAD_SHIFT 6 +#define REGAD_MASK (0x1f << REGAD_SHIFT) +#define REGAD(val) (((val) & REGAD_MASK) >> REGAD_SHIFT) +#define PHYAD_SHIFT 11 +#define PHYAD_MASK (0x1f << PHYAD_SHIFT) +#define PHYAD(val) (((val) & PHYAD_MASK) >> PHYAD_SHIFT) + +/* EMAC_SYSCTL Masks */ +#define PHYIE (1 << 0) +#define RXDWA (1 << 1) +#define RXCKS (1 << 2) +#define TXDWA (1 << 4) + +/* EMAC_RX_STAT Masks */ +#define RX_FRLEN 0x7ff +#define RX_COMP (1 << 12) +#define RX_OK (1 << 13) +#define RX_ACCEPT (1 << 31) + +/* EMAC_TX_STAT Masks */ +#define TX_COMP (1 << 0) +#define TX_OK (1 << 1) + +#endif |