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| author | Mike Frysinger <vapier@gentoo.org> | 2013-06-19 03:12:26 +0000 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2013-06-19 03:12:26 +0000 |
| commit | f7f8a049bdfeac603c87d2b784fc2eaf5bc9ad18 (patch) | |
| tree | 3585681aa7178c1a939ee1b9c9527b796d7b3516 /sim/bfin/ChangeLog | |
| parent | 8f250eb133241435bf70b2dbc4f620173f8067ea (diff) | |
| download | gdb-f7f8a049bdfeac603c87d2b784fc2eaf5bc9ad18.zip gdb-f7f8a049bdfeac603c87d2b784fc2eaf5bc9ad18.tar.gz gdb-f7f8a049bdfeac603c87d2b784fc2eaf5bc9ad18.tar.bz2 | |
sim: bfin: stricter insn decoding
We wrote a test case that tries every single 32bit opcode on the hardware
and compared it to the sim. There were a bunch of places in the sim where
we weren't strict enough (requiring certain parts of the opcode be set) so
we were treating a lot of invalid opcodes as valid ones. This sprinkles
out a lot additional checks in the dsp32alu class.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'sim/bfin/ChangeLog')
| -rw-r--r-- | sim/bfin/ChangeLog | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/sim/bfin/ChangeLog b/sim/bfin/ChangeLog index c6baf65..59c4ce2 100644 --- a/sim/bfin/ChangeLog +++ b/sim/bfin/ChangeLog @@ -1,3 +1,8 @@ +2013-06-18 Mike Frysinger <vapier@gentoo.org> + + * bfin-sim.c (decode_dsp32alu_0): Check more opcode fields before + decoding various insns. + 2013-06-17 Mike Frysinger <vapier@gentoo.org> * TODO: Add more notes. |