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| author | Mike Frysinger <vapier@gentoo.org> | 2011-03-24 03:14:20 +0000 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2011-03-24 03:14:20 +0000 |
| commit | 8e670c0a3f7a40555a8ad85d350b896df4140825 (patch) | |
| tree | 25ac6049a4e2e6db4a51978f5b1f72ea09a52518 /sim/bfin/ChangeLog | |
| parent | de0addfbefefa300907b90954f18f1e49f95e6bd (diff) | |
| download | gdb-8e670c0a3f7a40555a8ad85d350b896df4140825.zip gdb-8e670c0a3f7a40555a8ad85d350b896df4140825.tar.gz gdb-8e670c0a3f7a40555a8ad85d350b896df4140825.tar.bz2 | |
sim: bfin: update VIT_MAX behavior to match hardware when Acc.X bits are set
The Blackfin PRM says that the top 8 bits of the accumulator must be
cleared when using the VIT_MAX insn, so the sim has followed this spec.
Matching the hardware behavior though when the high bits are not cleared
is easy to do and doesn't break existing behavior, so go for it.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'sim/bfin/ChangeLog')
| -rw-r--r-- | sim/bfin/ChangeLog | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/sim/bfin/ChangeLog b/sim/bfin/ChangeLog index 0e37ddd..62d14bb 100644 --- a/sim/bfin/ChangeLog +++ b/sim/bfin/ChangeLog @@ -1,5 +1,10 @@ 2011-03-23 Robin Getz <robin.getz@analog.com> + * bfin-sim.c (decode_dsp32shift_0): Set acc0 to the unextended + value for the VIT_MAX insn, and mask off the result when done. + +2011-03-23 Robin Getz <robin.getz@analog.com> + * bfin-sim.c (decode_dsp32alu_0): Set A1 to a1_lo when up_hi is false, and set A0 to a0_lo when up_lo is false. |