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author | Nick Clifton <nickc@redhat.com> | 2001-05-08 08:28:28 +0000 |
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committer | Nick Clifton <nickc@redhat.com> | 2001-05-08 08:28:28 +0000 |
commit | dac07255f9d1ebda4c5cf7207781ce1d6e07562c (patch) | |
tree | 919317938847798bb86755869fafece51ca6ddda /sim/arm | |
parent | 9671de48921b4746825bdd2addbe3f4fd00146d8 (diff) | |
download | gdb-dac07255f9d1ebda4c5cf7207781ce1d6e07562c.zip gdb-dac07255f9d1ebda4c5cf7207781ce1d6e07562c.tar.gz gdb-dac07255f9d1ebda4c5cf7207781ce1d6e07562c.tar.bz2 |
Check Mode not Bank in order to determine rocesor mode.
Diffstat (limited to 'sim/arm')
-rw-r--r-- | sim/arm/ChangeLog | 5 | ||||
-rw-r--r-- | sim/arm/armsupp.c | 3 |
2 files changed, 7 insertions, 1 deletions
diff --git a/sim/arm/ChangeLog b/sim/arm/ChangeLog index 5c031ab..ee7b652 100644 --- a/sim/arm/ChangeLog +++ b/sim/arm/ChangeLog @@ -1,3 +1,8 @@ +2001-05-08 Jens-Christian Lache <lache@tu-harburg.de> + + * armsupp.c (ARMul_FixCPSR): Check Mode not Bank in order to + determine rocesor mode. + 2001-04-18 matthew green <mrg@redhat.com> * armcopro.c (write_cp15_reg): Set CHANGEMODE if endianness changes. diff --git a/sim/arm/armsupp.c b/sim/arm/armsupp.c index 2d0390d..99b6099 100644 --- a/sim/arm/armsupp.c +++ b/sim/arm/armsupp.c @@ -206,7 +206,8 @@ void ARMul_FixCPSR (ARMul_State * state, ARMword instr, ARMword rhs) { state->Cpsr = ARMul_GetCPSR (state); - if (state->Bank != USERBANK) + if (state->Mode != USER26MODE + && state->Mode != USER32MODE) { /* In user mode, only write flags */ if (BIT (16)) SETPSR_C (state->Cpsr, rhs); |