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author | Nick Clifton <nickc@redhat.com> | 2002-01-09 14:59:22 +0000 |
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committer | Nick Clifton <nickc@redhat.com> | 2002-01-09 14:59:22 +0000 |
commit | 272fcdcd59514699222bc34f9eb4ec6478ad7039 (patch) | |
tree | 7bf254613af7c4d29e49835db6f528bbe592013d /sim/arm/wrapper.c | |
parent | b3ca3a6a1f8315f2fc956c804292b3ff0f01408c (diff) | |
download | gdb-272fcdcd59514699222bc34f9eb4ec6478ad7039.zip gdb-272fcdcd59514699222bc34f9eb4ec6478ad7039.tar.gz gdb-272fcdcd59514699222bc34f9eb4ec6478ad7039.tar.bz2 |
Fix bug detected by GDB testsuite - when fetching registers more than 4
bytes wide return 0 for the other bytes.
Diffstat (limited to 'sim/arm/wrapper.c')
-rw-r--r-- | sim/arm/wrapper.c | 19 |
1 files changed, 14 insertions, 5 deletions
diff --git a/sim/arm/wrapper.c b/sim/arm/wrapper.c index 877f7fb..0c49666 100644 --- a/sim/arm/wrapper.c +++ b/sim/arm/wrapper.c @@ -220,6 +220,10 @@ sim_create_inferior (sd, abfd, argv, env) /* We wouldn't set the machine type with earlier toolchains, so we explicitly select a processor capable of supporting all ARMs in 32bit mode. */ + case bfd_mach_arm_XScale: + ARMul_SelectProcessor (state, ARM_v5_Prop | ARM_v5e_Prop | ARM_XScale_Prop); + break; + case bfd_mach_arm_5: case bfd_mach_arm_5T: ARMul_SelectProcessor (state, ARM_v5_Prop); @@ -229,10 +233,6 @@ sim_create_inferior (sd, abfd, argv, env) ARMul_SelectProcessor (state, ARM_v5_Prop | ARM_v5e_Prop); break; - case bfd_mach_arm_XScale: - ARMul_SelectProcessor (state, ARM_v5_Prop | ARM_v5e_Prop | ARM_XScale_Prop); - break; - case bfd_mach_arm_4: case bfd_mach_arm_4T: ARMul_SelectProcessor (state, ARM_v4_Prop); @@ -395,7 +395,16 @@ sim_fetch_register (sd, rn, memory, length) regval = ARMul_GetCPSR (state); else regval = 0; /* FIXME: should report an error */ - tomem (state, memory, regval); + + while (length) + { + tomem (state, memory, regval); + + length -= 4; + memory += 4; + regval = 0; + } + return -1; } |