Replace StrongARM property with v4 and v5 properties.

1 files changed, 23 insertions, 9 deletions

diff --git a/sim/arm/armemu.h b/sim/arm/armemu.h
index 7bca8d3..81ecd52 100644
--- a/sim/arm/armemu.h
+++ b/sim/arm/armemu.h
@@ -230,15 +230,29 @@ extern ARMword isize;
 #define RESUME 8
 
 #define NORMALCYCLE state->NextInstr = 0
-#define BUSUSEDN state->NextInstr |= 1	/* the next fetch will be an N cycle */
-#define BUSUSEDINCPCS do { if (! state->is_StrongARM) { \
-			state->Reg[15] += isize ; /* a standard PC inc and an S cycle */ \
-			state->NextInstr = (state->NextInstr & 0xff) | 2; \
-		      } } while (0)
-#define BUSUSEDINCPCN do { if (state->is_StrongARM) BUSUSEDN; else { \
-			state->Reg[15] += isize ; /* a standard PC inc and an N cycle */ \
-			state->NextInstr |= 3; \
-		      } } while (0)
+#define BUSUSEDN    state->NextInstr |= 1  /* The next fetch will be an N cycle.  */
+#define BUSUSEDINCPCS								\
+  do										\
+    {										\
+      if (! state->is_v4)							\
+        { 									\
+	  state->Reg[15] += isize ; /* A standard PC inc and an S cycle.  */ 	\
+	  state->NextInstr = (state->NextInstr & 0xff) | 2; 			\
+	}									\
+    }										\
+  while (0)
+#define BUSUSEDINCPCN								\
+  do										\
+    {										\
+      if (state->is_v4)								\
+	BUSUSEDN;								\
+      else									\
+	{ 									\
+	  state->Reg[15] += isize ; /* A standard PC inc and an N cycle.  */	\
+	  state->NextInstr |= 3;						\
+	}									\
+    }										\
+  while (0)
 #define INCPC state->Reg[15] += isize ; /* a standard PC inc */ \
               state->NextInstr |= 2
 #define FLUSHPIPE state->NextInstr |= PRIMEPIPE