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authorAlexandre Oliva <aoliva@redhat.com>2000-07-04 07:18:18 +0000
committerAlexandre Oliva <aoliva@redhat.com>2000-07-04 07:18:18 +0000
commit1e6b544a9787ed223fb9c9a462facc62c23d517b (patch)
treea26c291855f6e63fd5fa52756b7a5f66c23b5c4f /sim/arm/armemu.h
parent66210567f07e22e5f43e4e648358fc6b0fceac44 (diff)
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* armdefs.h (struct ARMul_State): Add is_StrongARM.
(ARM_Strong_Prop, STRONGARM): Define. * arminit.c (ARMul_NewState): Reset is_StrongARM. (ARMul_SelectProcessor): Set is_StrongARM. * wrapper.c (sim_create_inferior): Use bfd machine type to determine processor type to emulate. * armemu.h (BUSUSEDINCPCS, BUSUSEDINCPCN): Don't increment PC when emulating StrongARM.
Diffstat (limited to 'sim/arm/armemu.h')
-rw-r--r--sim/arm/armemu.h12
1 files changed, 8 insertions, 4 deletions
diff --git a/sim/arm/armemu.h b/sim/arm/armemu.h
index de836cb..7bca8d3 100644
--- a/sim/arm/armemu.h
+++ b/sim/arm/armemu.h
@@ -231,10 +231,14 @@ extern ARMword isize;
#define NORMALCYCLE state->NextInstr = 0
#define BUSUSEDN state->NextInstr |= 1 /* the next fetch will be an N cycle */
-#define BUSUSEDINCPCS state->Reg[15] += isize ; /* a standard PC inc and an S cycle */ \
- state->NextInstr = (state->NextInstr & 0xff) | 2
-#define BUSUSEDINCPCN state->Reg[15] += isize ; /* a standard PC inc and an N cycle */ \
- state->NextInstr |= 3
+#define BUSUSEDINCPCS do { if (! state->is_StrongARM) { \
+ state->Reg[15] += isize ; /* a standard PC inc and an S cycle */ \
+ state->NextInstr = (state->NextInstr & 0xff) | 2; \
+ } } while (0)
+#define BUSUSEDINCPCN do { if (state->is_StrongARM) BUSUSEDN; else { \
+ state->Reg[15] += isize ; /* a standard PC inc and an N cycle */ \
+ state->NextInstr |= 3; \
+ } } while (0)
#define INCPC state->Reg[15] += isize ; /* a standard PC inc */ \
state->NextInstr |= 2
#define FLUSHPIPE state->NextInstr |= PRIMEPIPE