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author | Nick Clifton <nickc@redhat.com> | 2002-05-27 14:12:00 +0000 |
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committer | Nick Clifton <nickc@redhat.com> | 2002-05-27 14:12:00 +0000 |
commit | 10b57fcbd720b5fab5b54901e7c80a2b39898cc4 (patch) | |
tree | 24dd8123d4584f1b4d3de8d09e2b47b0cb85fa7b /sim/arm/armemu.c | |
parent | f08caad151ffb2884eeb58c956f931ea8d30e0bf (diff) | |
download | gdb-10b57fcbd720b5fab5b54901e7c80a2b39898cc4.zip gdb-10b57fcbd720b5fab5b54901e7c80a2b39898cc4.tar.gz gdb-10b57fcbd720b5fab5b54901e7c80a2b39898cc4.tar.bz2 |
Only perform access checks if 'check' is set.
Report unknown machine numbers.
Formatting tidy ups.
Diffstat (limited to 'sim/arm/armemu.c')
-rw-r--r-- | sim/arm/armemu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sim/arm/armemu.c b/sim/arm/armemu.c index ea2bdfd..8e71926 100644 --- a/sim/arm/armemu.c +++ b/sim/arm/armemu.c @@ -3206,7 +3206,7 @@ check_PMUintr: ARMul_UndefInstr (state, instr); else { - /* XScale MAR insn. Move two registers into accumulator. */ + /* XScale MAR insn. Move two registers into accumulator. */ state->Accumulator = state->Reg[BITS (12, 15)]; state->Accumulator += (ARMdword) state->Reg[BITS (16, 19)] << 32; } |