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author | Matthew Green <mrg@redhat.com> | 2001-04-18 16:39:37 +0000 |
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committer | Matthew Green <mrg@redhat.com> | 2001-04-18 16:39:37 +0000 |
commit | c3ae2f98d01baddf23a93ea5c2311701844f8b82 (patch) | |
tree | 3e361057a3fd8c1ac85f93f87282ce628e7f09ed /sim/arm/armdefs.h | |
parent | c9e030cfcdebafd5fb515b93e9d30a6eda273d53 (diff) | |
download | gdb-c3ae2f98d01baddf23a93ea5c2311701844f8b82.zip gdb-c3ae2f98d01baddf23a93ea5c2311701844f8b82.tar.gz gdb-c3ae2f98d01baddf23a93ea5c2311701844f8b82.tar.bz2 |
* XScale coprocessor support.
2001-04-18 matthew green <mrg@redhat.com>
* armcopro.c (write_cp15_reg): Set CHANGEMODE if endianness changes.
(read_cp15_reg): Make non-static.
(XScale_cp15_LDC): Update for write_cp15_reg() change.
(XScale_cp15_MCR): Likewise.
(XScale_cp15_write_reg): Likewise.
(XScale_check_memacc): New function. Check for breakpoints being
activated by memory accesses. Does not support the Branch Target
Buffer.
(XScale_set_fsr_far): New function. Set FSR and FAR for XScale.
(XScale_debug_moe): New function. Set the debug Method Of Entry,
if configured.
(write_cp14_reg): Reset count counter if requested.
* armdefs.h (struct ARMul_State): New members `LastTime' and
`CP14R0_CCD' used for the timer/counters.
(ARMul_CP13_R0_FIQ, ARMul_CP13_R0_IRQ, ARMul_CP13_R8_PMUS,
ARMul_CP14_R0_ENABLE, ARMul_CP14_R0_CLKRST, ARMul_CP14_R0_CCD,
ARMul_CP14_R0_INTEN0, ARMul_CP14_R0_INTEN1, ARMul_CP14_R0_INTEN2,
ARMul_CP14_R0_FLAG0, ARMul_CP14_R0_FLAG1, ARMul_CP14_R0_FLAG2,
ARMul_CP14_R10_MOE_IB, ARMul_CP14_R10_MOE_DB, ARMul_CP14_R10_MOE_BT,
ARMul_CP15_R1_ENDIAN, ARMul_CP15_R1_ALIGN, ARMul_CP15_R5_X,
ARMul_CP15_R5_ST_ALIGN, ARMul_CP15_R5_IMPRE, ARMul_CP15_R5_MMU_EXCPT,
ARMul_CP15_DBCON_M, ARMul_CP15_DBCON_E1, ARMul_CP15_DBCON_E0): New
defines for XScale registers.
(XScale_check_memacc, XScale_set_fsr_far, XScale_debug_moe): Prototype.
(ARMul_Emulate32, ARMul_Emulate26): Clean up function definition.
(ARMul_Emulate32): Handle the clock counter and hardware instruction
breakpoints. Call XScale_set_fsr_far() for software breakpoints and
software interrupts.
(LoadMult): Call XScale_set_fsr_far() for data aborts.
(LoadSMult): Likewise.
(StoreMult): Likewise.
(StoreSMult): Likewise.
* armemu.h (write_cp15_reg): Update prototype.
* arminit.c (ARMul_NewState): Initialise CP14R0_CCD and LastTime.
(ARMul_Abort): If XScale, check for FIQ and IRQ being enabled in CP13
register 0.
* armvirt.c (GetWord): Call XScale_check_memacc().
(PutWord): Likewise.
Diffstat (limited to 'sim/arm/armdefs.h')
-rw-r--r-- | sim/arm/armdefs.h | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/sim/arm/armdefs.h b/sim/arm/armdefs.h index 4ad5c5f..fde3125 100644 --- a/sim/arm/armdefs.h +++ b/sim/arm/armdefs.h @@ -102,6 +102,9 @@ struct ARMul_State ARMul_CPWrites *CPWrite[16]; /* Write CP register */ unsigned char *CPData[16]; /* Coprocessor data */ unsigned char const *CPRegWords[16]; /* map of coprocessor register sizes */ + unsigned long LastTime; /* Value of last call to ARMul_Time() */ + ARMword CP14R0_CCD; /* used to count 64 clock cycles with CP14 R0 bit + 3 set */ unsigned EventSet; /* the number of events in the queue */ unsigned long Now; /* time to the nearest cycle */ @@ -342,6 +345,32 @@ extern ARMword ARMul_MemAccess (ARMul_State * state, ARMword, ARMword, #define ARMul_CANT 1 #define ARMul_INC 3 +#define ARMul_CP13_R0_FIQ 0x1 +#define ARMul_CP13_R0_IRQ 0x2 +#define ARMul_CP13_R8_PMUS 0x1 + +#define ARMul_CP14_R0_ENABLE 0x0001 +#define ARMul_CP14_R0_CLKRST 0x0004 +#define ARMul_CP14_R0_CCD 0x0008 +#define ARMul_CP14_R0_INTEN0 0x0010 +#define ARMul_CP14_R0_INTEN1 0x0020 +#define ARMul_CP14_R0_INTEN2 0x0040 +#define ARMul_CP14_R0_FLAG0 0x0100 +#define ARMul_CP14_R0_FLAG1 0x0200 +#define ARMul_CP14_R0_FLAG2 0x0400 +#define ARMul_CP14_R10_MOE_IB 0x0004 +#define ARMul_CP14_R10_MOE_DB 0x0008 +#define ARMul_CP14_R10_MOE_BT 0x000c +#define ARMul_CP15_R1_ENDIAN 0x0080 +#define ARMul_CP15_R1_ALIGN 0x0002 +#define ARMul_CP15_R5_X 0x0400 +#define ARMul_CP15_R5_ST_ALIGN 0x0001 +#define ARMul_CP15_R5_IMPRE 0x0406 +#define ARMul_CP15_R5_MMU_EXCPT 0x0400 +#define ARMul_CP15_DBCON_M 0x0100 +#define ARMul_CP15_DBCON_E1 0x000c +#define ARMul_CP15_DBCON_E0 0x0003 + extern unsigned ARMul_CoProInit (ARMul_State * state); extern void ARMul_CoProExit (ARMul_State * state); extern void ARMul_CoProAttach (ARMul_State * state, unsigned number, @@ -351,6 +380,10 @@ extern void ARMul_CoProAttach (ARMul_State * state, unsigned number, ARMul_CDPs * cdp, ARMul_CPReads * read, ARMul_CPWrites * write); extern void ARMul_CoProDetach (ARMul_State * state, unsigned number); +extern void XScale_check_memacc (ARMul_State * state, ARMword * address, + int store); +extern void XScale_set_fsr_far (ARMul_State * state, ARMword fsr, ARMword far); +extern int XScale_debug_moe (ARMul_State * state, int moe); /***************************************************************************\ * Definitons of things in the host environment * |