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authorNick Clifton <nickc@redhat.com>2005-04-25 07:48:59 +0000
committerNick Clifton <nickc@redhat.com>2005-04-25 07:48:59 +0000
commit8207e0f24ed02f921d7eb24fd80ac919e38a36f7 (patch)
tree9bb01fd4e158a04fcc06289c39d2b7a400495e6e /sim/arm/armdefs.h
parent02ddf1568180e41117d6d2804636e64775ac37b6 (diff)
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* armemu.c (handle_v6_insn): New function - emulate a few of the v6 instructions - the ones now generated by GCC.
(ARMulEmulate32): Call handle_v6_insn when a possible v6 insn is found. * armdefs.h (struct ARMul_State): Add new field: is_v6.# (ARM_v6_Prop): Define. * arminit.c (ARMul_NewState): Initialise the v6 flag. (ARMul_SelectProcessor): Determine if the v6 flag should be set. * wrapper.c (sim_create_inferior): For unknown architectures, default to allowing the v6 instructions.
Diffstat (limited to 'sim/arm/armdefs.h')
-rw-r--r--sim/arm/armdefs.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/sim/arm/armdefs.h b/sim/arm/armdefs.h
index a2ea405..e2d2d95 100644
--- a/sim/arm/armdefs.h
+++ b/sim/arm/armdefs.h
@@ -134,6 +134,7 @@ struct ARMul_State
unsigned is_v4; /* Are we emulating a v4 architecture (or higher) ? */
unsigned is_v5; /* Are we emulating a v5 architecture ? */
unsigned is_v5e; /* Are we emulating a v5e architecture ? */
+ unsigned is_v6; /* Are we emulating a v6 architecture ? */
unsigned is_XScale; /* Are we emulating an XScale architecture ? */
unsigned is_iWMMXt; /* Are we emulating an iWMMXt co-processor ? */
unsigned is_ep9312; /* Are we emulating a Cirrus Maverick co-processor ? */
@@ -166,6 +167,7 @@ struct ARMul_State
#define ARM_XScale_Prop 0x200
#define ARM_ep9312_Prop 0x400
#define ARM_iWMMXt_Prop 0x800
+#define ARM_v6_Prop 0x1000
/***************************************************************************\
* Macros to extract instruction fields *