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| author | Alexandre Oliva <aoliva@redhat.com> | 2000-07-04 06:35:36 +0000 |
|---|---|---|
| committer | Alexandre Oliva <aoliva@redhat.com> | 2000-07-04 06:35:36 +0000 |
| commit | 892c6b9d8fca691330232aaea9c0aaaff880feb1 (patch) | |
| tree | 55ad5d35c9581a69e5f64e927b43676ad6f798a1 /sim/arm/ChangeLog | |
| parent | cf52c765b09c13868d5cc5a8eb0297854be660d5 (diff) | |
| download | gdb-892c6b9d8fca691330232aaea9c0aaaff880feb1.zip gdb-892c6b9d8fca691330232aaea9c0aaaff880feb1.tar.gz gdb-892c6b9d8fca691330232aaea9c0aaaff880feb1.tar.bz2 | |
* armemu.h (WRITEDESTB): New macro.
* armemu.c (ARMul_Emulate26, bl): Use WriteR15Branch() to
modify PC. Moved the existing logic...
(WriteR15Branch): ... here. New function.
(WriteR15, WriteSR15): Drop the two least significant bits.
(LoadSMult): Use WriteR15Branch() to modify PC.
(LoadMult): Use WRITEDESTB() instead of WRITEDEST().
Diffstat (limited to 'sim/arm/ChangeLog')
| -rw-r--r-- | sim/arm/ChangeLog | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/sim/arm/ChangeLog b/sim/arm/ChangeLog index 1b3a557..526b49d 100644 --- a/sim/arm/ChangeLog +++ b/sim/arm/ChangeLog @@ -1,5 +1,13 @@ 2000-07-04 Alexandre Oliva <aoliva@redhat.com> + * armemu.h (WRITEDESTB): New macro. + * armemu.c (ARMul_Emulate26, bl): Use WriteR15Branch() to + modify PC. Moved the existing logic... + (WriteR15Branch): ... here. New function. + (WriteR15, WriteSR15): Drop the two least significant bits. + (LoadSMult): Use WriteR15Branch() to modify PC. + (LoadMult): Use WRITEDESTB() instead of WRITEDEST(). + * armemu.h (GETSPSR): Call ARMul_GetSPSR(). * armsupp.c (ARMul_CPSRAltered): Zero out bits as they're extracted from state->Cpsr, but preserve the unused bits. |