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author | Alexandre Oliva <aoliva@redhat.com> | 2000-07-04 06:19:29 +0000 |
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committer | Alexandre Oliva <aoliva@redhat.com> | 2000-07-04 06:19:29 +0000 |
commit | cf52c765b09c13868d5cc5a8eb0297854be660d5 (patch) | |
tree | 00d14d325741ffd2f05ff67a9360b6df05f9c583 /sim/arm/ChangeLog | |
parent | 4ef2594f4ed0fe4191d9e791e84b6241f968fc7c (diff) | |
download | gdb-cf52c765b09c13868d5cc5a8eb0297854be660d5.zip gdb-cf52c765b09c13868d5cc5a8eb0297854be660d5.tar.gz gdb-cf52c765b09c13868d5cc5a8eb0297854be660d5.tar.bz2 |
* armemu.h (GETSPSR): Call ARMul_GetSPSR().
* armsupp.c (ARMul_CPSRAltered): Zero out bits as they're
extracted from state->Cpsr, but preserve the unused bits.
(ARMul_GetCPSR): Get bits preserved in state->Cpsr.
(ARMul_GetSPSR, ARMul_FixCPSR): Use ARMul_GetCPSR() to
get the full CPSR word.
Diffstat (limited to 'sim/arm/ChangeLog')
-rw-r--r-- | sim/arm/ChangeLog | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/sim/arm/ChangeLog b/sim/arm/ChangeLog index e401eef..1b3a557 100644 --- a/sim/arm/ChangeLog +++ b/sim/arm/ChangeLog @@ -1,5 +1,12 @@ 2000-07-04 Alexandre Oliva <aoliva@redhat.com> + * armemu.h (GETSPSR): Call ARMul_GetSPSR(). + * armsupp.c (ARMul_CPSRAltered): Zero out bits as they're + extracted from state->Cpsr, but preserve the unused bits. + (ARMul_GetCPSR): Get bits preserved in state->Cpsr. + (ARMul_GetSPSR, ARMul_FixCPSR): Use ARMul_GetCPSR() to + get the full CPSR word. + * armemu.h (PSR_FBITS, PSR_SBITS, PSR_XBITS, PSR_CBITS): New. (SETPSR_F, SETPSR_S, SETPSR_X, SETPSR_C): New macros. (SETPSR, SET_INTMODE, SETCC): Removed. |