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| author | Alexandre Oliva <aoliva@redhat.com> | 2000-07-04 06:52:30 +0000 |
|---|---|---|
| committer | Alexandre Oliva <aoliva@redhat.com> | 2000-07-04 06:52:30 +0000 |
| commit | e063aa3bd8d3712e37a287603d3256282c209def (patch) | |
| tree | 7e016132f8291cc7f4fdb5f8d129816f2e58495e /sim/arm/ChangeLog | |
| parent | 13b6dd6f68d9eb79f9d3dbe730ec1b6aa9bef737 (diff) | |
| download | gdb-e063aa3bd8d3712e37a287603d3256282c209def.zip gdb-e063aa3bd8d3712e37a287603d3256282c209def.tar.gz gdb-e063aa3bd8d3712e37a287603d3256282c209def.tar.bz2 | |
* armemu.h (INSN_SIZE): New macro.
(SET_ABORT): Save CPSR in SPSR and set LR.
* armemu.c (ARMul_Emulate, isize): Set to INSN_SIZE.
(WriteR15, WriteSR15): Do not discard bit 1 in Thumb mode.
* arminit.c (ARMul_Abort): Use new SETABORT and INSN_SIZE.
Diffstat (limited to 'sim/arm/ChangeLog')
| -rw-r--r-- | sim/arm/ChangeLog | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/sim/arm/ChangeLog b/sim/arm/ChangeLog index 06345b2..9e4bdc0 100644 --- a/sim/arm/ChangeLog +++ b/sim/arm/ChangeLog @@ -1,5 +1,11 @@ 2000-07-04 Alexandre Oliva <aoliva@redhat.com> + * armemu.h (INSN_SIZE): New macro. + (SET_ABORT): Save CPSR in SPSR and set LR. + * armemu.c (ARMul_Emulate, isize): Set to INSN_SIZE. + (WriteR15, WriteSR15): Do not discard bit 1 in Thumb mode. + * arminit.c (ARMul_Abort): Use new SETABORT and INSN_SIZE. + * armemu.c (LoadSMult): Use WriteR15() to discard the least significant bits of PC. |