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author | Richard Sandiford <rdsandiford@googlemail.com> | 2013-07-07 09:32:55 +0000 |
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committer | Richard Sandiford <rdsandiford@googlemail.com> | 2013-07-07 09:32:55 +0000 |
commit | fa7616a4c7661cf786f3eaa9282072ca5dd8099c (patch) | |
tree | 11ef2eb4ec10903834cb68365334d7a26b77c1b0 /setup.com | |
parent | 7c0de7419bd4f1b4aa0bdb3c15b03615dbe3959a (diff) | |
download | gdb-fa7616a4c7661cf786f3eaa9282072ca5dd8099c.zip gdb-fa7616a4c7661cf786f3eaa9282072ca5dd8099c.tar.gz gdb-fa7616a4c7661cf786f3eaa9282072ca5dd8099c.tar.bz2 |
include/opcode/
* mips.h: Remove documentation of "+D" and "+T".
opcodes/
* mips-opc.c (mips_builtin_opcodes): Remove "+D" and "+T" entries.
* micromips-opc.c (micromips_opcodes): Likewise.
* mips-dis.c (print_insn_args, print_insn_micromips): Remove "+D"
and "+T" handling. Check for a "0" suffix when deciding whether to
use coprocessor 0 names. In that case, also check for ",H" selectors.
gas/
* config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
(mips_ip): Remove "+D" and "+T" handling.
gas/testsuite/
* gas/mips/lb.d, gas/mips/sb.d: Use coprocessor register names
for LWC0 and SWC0.
Diffstat (limited to 'setup.com')
0 files changed, 0 insertions, 0 deletions