diff options
author | H.J. Lu <hjl.tools@gmail.com> | 2019-06-27 13:39:19 -0700 |
---|---|---|
committer | H.J. Lu <hjl.tools@gmail.com> | 2019-06-27 13:39:32 -0700 |
commit | e395f487b3758b3de99fddd2ef15a799e9fc1203 (patch) | |
tree | c4f2177a544c1c49c99d1dd05ee294250cb733cb /opcodes | |
parent | 1b7f24cd6b4e96c64bf82eba06be2c48942699fa (diff) | |
download | gdb-e395f487b3758b3de99fddd2ef15a799e9fc1203.zip gdb-e395f487b3758b3de99fddd2ef15a799e9fc1203.tar.gz gdb-e395f487b3758b3de99fddd2ef15a799e9fc1203.tar.bz2 |
i386: Check vector length for scatter/gather prefetch instructions
Since not all vector lengths are supported by scatter/gather prefetch
instructions, decode them only with supported vector lengths.
gas/
PR binutils/24719
* testsuite/gas/i386/disassem.s: Add test for vgatherpf0dps
with invalid vector length.
* testsuite/gas/i386/x86-64-disassem.s: Likewise.
* testsuite/gas/i386/disassem.d: Updated.
* testsuite/gas/i386/x86-64-disassem.d: Likewise.
opcodes/
PR binutils/24719
* i386-dis-evex-len.h: Add EVEX_LEN_0F38C6_REG_1_PREFIX_2,
EVEX_LEN_0F38C6_REG_2_PREFIX_2, EVEX_LEN_0F38C6_REG_5_PREFIX_2,
EVEX_LEN_0F38C6_REG_6_PREFIX_2, EVEX_LEN_0F38C7_R_1_P_2_W_0,
EVEX_LEN_0F38C7_R_1_P_2_W_1, EVEX_LEN_0F38C7_R_2_P_2_W_0,
EVEX_LEN_0F38C7_R_2_P_2_W_1, EVEX_LEN_0F38C7_R_5_P_2_W_0,
EVEX_LEN_0F38C7_R_5_P_2_W_1, EVEX_LEN_0F38C7_R_6_P_2_W_0 and
EVEX_LEN_0F38C7_R_6_P_2_W_1.
* i386-dis-evex-prefix.h: Update PREFIX_EVEX_0F38C6_REG_1,
PREFIX_EVEX_0F38C6_REG_2, PREFIX_EVEX_0F38C6_REG_5 and
PREFIX_EVEX_0F38C6_REG_6 entries.
* i386-dis-evex-w.h: Update EVEX_W_0F38C7_R_1_P_2,
EVEX_W_0F38C7_R_2_P_2, EVEX_W_0F38C7_R_5_P_2 and
EVEX_W_0F38C7_R_6_P_2 entries.
* i386-dis.c: Add EVEX_LEN_0F38C6_REG_1_PREFIX_2,
EVEX_LEN_0F38C6_REG_2_PREFIX_2, EVEX_LEN_0F38C6_REG_5_PREFIX_2,
EVEX_LEN_0F38C6_REG_6_PREFIX_2, EVEX_LEN_0F38C7_R_1_P_2_W_0,
EVEX_LEN_0F38C7_R_1_P_2_W_1, EVEX_LEN_0F38C7_R_2_P_2_W_0,
EVEX_LEN_0F38C7_R_2_P_2_W_1, EVEX_LEN_0F38C7_R_5_P_2_W_0,
EVEX_LEN_0F38C7_R_5_P_2_W_1, EVEX_LEN_0F38C7_R_6_P_2_W_0 and
EVEX_LEN_0F38C7_R_6_P_2_W_1 enums.
Diffstat (limited to 'opcodes')
-rw-r--r-- | opcodes/ChangeLog | 24 | ||||
-rw-r--r-- | opcodes/i386-dis-evex-len.h | 84 | ||||
-rw-r--r-- | opcodes/i386-dis-evex-prefix.h | 8 | ||||
-rw-r--r-- | opcodes/i386-dis-evex-w.h | 16 | ||||
-rw-r--r-- | opcodes/i386-dis.c | 12 |
5 files changed, 132 insertions, 12 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index abf77be..a6eb697 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,27 @@ +2019-06-27 H.J. Lu <hongjiu.lu@intel.com> + + PR binutils/24719 + * i386-dis-evex-len.h: Add EVEX_LEN_0F38C6_REG_1_PREFIX_2, + EVEX_LEN_0F38C6_REG_2_PREFIX_2, EVEX_LEN_0F38C6_REG_5_PREFIX_2, + EVEX_LEN_0F38C6_REG_6_PREFIX_2, EVEX_LEN_0F38C7_R_1_P_2_W_0, + EVEX_LEN_0F38C7_R_1_P_2_W_1, EVEX_LEN_0F38C7_R_2_P_2_W_0, + EVEX_LEN_0F38C7_R_2_P_2_W_1, EVEX_LEN_0F38C7_R_5_P_2_W_0, + EVEX_LEN_0F38C7_R_5_P_2_W_1, EVEX_LEN_0F38C7_R_6_P_2_W_0 and + EVEX_LEN_0F38C7_R_6_P_2_W_1. + * i386-dis-evex-prefix.h: Update PREFIX_EVEX_0F38C6_REG_1, + PREFIX_EVEX_0F38C6_REG_2, PREFIX_EVEX_0F38C6_REG_5 and + PREFIX_EVEX_0F38C6_REG_6 entries. + * i386-dis-evex-w.h: Update EVEX_W_0F38C7_R_1_P_2, + EVEX_W_0F38C7_R_2_P_2, EVEX_W_0F38C7_R_5_P_2 and + EVEX_W_0F38C7_R_6_P_2 entries. + * i386-dis.c: Add EVEX_LEN_0F38C6_REG_1_PREFIX_2, + EVEX_LEN_0F38C6_REG_2_PREFIX_2, EVEX_LEN_0F38C6_REG_5_PREFIX_2, + EVEX_LEN_0F38C6_REG_6_PREFIX_2, EVEX_LEN_0F38C7_R_1_P_2_W_0, + EVEX_LEN_0F38C7_R_1_P_2_W_1, EVEX_LEN_0F38C7_R_2_P_2_W_0, + EVEX_LEN_0F38C7_R_2_P_2_W_1, EVEX_LEN_0F38C7_R_5_P_2_W_0, + EVEX_LEN_0F38C7_R_5_P_2_W_1, EVEX_LEN_0F38C7_R_6_P_2_W_0 and + EVEX_LEN_0F38C7_R_6_P_2_W_1 enums. + 2019-06-27 Jan Beulich <jbeulich@suse.com> * i386-dis.c (VEX_LEN_0F2A_P_1, VEX_LEN_0F2A_P_3, diff --git a/opcodes/i386-dis-evex-len.h b/opcodes/i386-dis-evex-len.h index 50b89eb..ce58199 100644 --- a/opcodes/i386-dis-evex-len.h +++ b/opcodes/i386-dis-evex-len.h @@ -89,6 +89,90 @@ static const struct dis386 evex_len_table[][3] = { { "vbroadcasti64x4", { XM, EXymm }, 0 }, }, + /* EVEX_LEN_0F38C6_REG_1_PREFIX_2 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { "vgatherpf0dp%XW", { MVexVSIBDWpX }, 0 }, + }, + + /* EVEX_LEN_0F38C6_REG_2_PREFIX_2 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { "vgatherpf1dp%XW", { MVexVSIBDWpX }, 0 }, + }, + + /* EVEX_LEN_0F38C6_REG_5_PREFIX_2 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { "vscatterpf0dp%XW", { MVexVSIBDWpX }, 0 }, + }, + + /* EVEX_LEN_0F38C6_REG_6_PREFIX_2 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { "vscatterpf1dp%XW", { MVexVSIBDWpX }, 0 }, + }, + + /* EVEX_LEN_0F38C7_R_1_P_2_W_0 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { "vgatherpf0qps", { MVexVSIBDQWpX }, 0 }, + }, + + /* EVEX_LEN_0F38C7_R_1_P_2_W_1 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { "vgatherpf0qpd", { MVexVSIBQWpX }, 0 }, + }, + + /* EVEX_LEN_0F38C7_R_2_P_2_W_0 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { "vgatherpf1qps", { MVexVSIBDQWpX }, 0 }, + }, + + /* EVEX_LEN_0F38C7_R_2_P_2_W_1 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { "vgatherpf1qpd", { MVexVSIBQWpX }, 0 }, + }, + + /* EVEX_LEN_0F38C7_R_5_P_2_W_0 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { "vscatterpf0qps", { MVexVSIBDQWpX }, 0 }, + }, + + /* EVEX_LEN_0F38C7_R_5_P_2_W_1 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { "vscatterpf0qpd", { MVexVSIBQWpX }, 0 }, + }, + + /* EVEX_LEN_0F38C7_R_6_P_2_W_0 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { "vscatterpf1qps", { MVexVSIBDQWpX }, 0 }, + }, + + /* EVEX_LEN_0F38C7_R_6_P_2_W_1 */ + { + { Bad_Opcode }, + { Bad_Opcode }, + { "vscatterpf1qpd", { MVexVSIBQWpX }, 0 }, + }, + /* EVEX_LEN_0F3A18_P_2_W_0 */ { { Bad_Opcode }, diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h index 261b01f..248d7a2 100644 --- a/opcodes/i386-dis-evex-prefix.h +++ b/opcodes/i386-dis-evex-prefix.h @@ -1557,25 +1557,25 @@ { { Bad_Opcode }, { Bad_Opcode }, - { "vgatherpf0dp%XW", { MVexVSIBDWpX }, 0 }, + { EVEX_LEN_TABLE (EVEX_LEN_0F38C6_REG_1_PREFIX_2) }, }, /* PREFIX_EVEX_0F38C6_REG_2 */ { { Bad_Opcode }, { Bad_Opcode }, - { "vgatherpf1dp%XW", { MVexVSIBDWpX }, 0 }, + { EVEX_LEN_TABLE (EVEX_LEN_0F38C6_REG_2_PREFIX_2) }, }, /* PREFIX_EVEX_0F38C6_REG_5 */ { { Bad_Opcode }, { Bad_Opcode }, - { "vscatterpf0dp%XW", { MVexVSIBDWpX }, 0 }, + { EVEX_LEN_TABLE (EVEX_LEN_0F38C6_REG_5_PREFIX_2) }, }, /* PREFIX_EVEX_0F38C6_REG_6 */ { { Bad_Opcode }, { Bad_Opcode }, - { "vscatterpf1dp%XW", { MVexVSIBDWpX }, 0 }, + { EVEX_LEN_TABLE (EVEX_LEN_0F38C6_REG_6_PREFIX_2) }, }, /* PREFIX_EVEX_0F38C7_REG_1 */ { diff --git a/opcodes/i386-dis-evex-w.h b/opcodes/i386-dis-evex-w.h index 2adfde9..44e4b48 100644 --- a/opcodes/i386-dis-evex-w.h +++ b/opcodes/i386-dis-evex-w.h @@ -939,23 +939,23 @@ }, /* EVEX_W_0F38C7_R_1_P_2 */ { - { "vgatherpf0qps", { MVexVSIBDQWpX }, 0 }, - { "vgatherpf0qpd", { MVexVSIBQWpX }, 0 }, + { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_1_P_2_W_0) }, + { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_1_P_2_W_1) }, }, /* EVEX_W_0F38C7_R_2_P_2 */ { - { "vgatherpf1qps", { MVexVSIBDQWpX }, 0 }, - { "vgatherpf1qpd", { MVexVSIBQWpX }, 0 }, + { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_2_P_2_W_0) }, + { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_2_P_2_W_1) }, }, /* EVEX_W_0F38C7_R_5_P_2 */ { - { "vscatterpf0qps", { MVexVSIBDQWpX }, 0 }, - { "vscatterpf0qpd", { MVexVSIBQWpX }, 0 }, + { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_5_P_2_W_0) }, + { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_5_P_2_W_1) }, }, /* EVEX_W_0F38C7_R_6_P_2 */ { - { "vscatterpf1qps", { MVexVSIBDQWpX }, 0 }, - { "vscatterpf1qpd", { MVexVSIBQWpX }, 0 }, + { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_6_P_2_W_0) }, + { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_6_P_2_W_1) }, }, /* EVEX_W_0F3A00_P_2 */ { diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 281d02c..de99462 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -1939,6 +1939,18 @@ enum EVEX_LEN_0F385A_P_2_W_1, EVEX_LEN_0F385B_P_2_W_0, EVEX_LEN_0F385B_P_2_W_1, + EVEX_LEN_0F38C6_REG_1_PREFIX_2, + EVEX_LEN_0F38C6_REG_2_PREFIX_2, + EVEX_LEN_0F38C6_REG_5_PREFIX_2, + EVEX_LEN_0F38C6_REG_6_PREFIX_2, + EVEX_LEN_0F38C7_R_1_P_2_W_0, + EVEX_LEN_0F38C7_R_1_P_2_W_1, + EVEX_LEN_0F38C7_R_2_P_2_W_0, + EVEX_LEN_0F38C7_R_2_P_2_W_1, + EVEX_LEN_0F38C7_R_5_P_2_W_0, + EVEX_LEN_0F38C7_R_5_P_2_W_1, + EVEX_LEN_0F38C7_R_6_P_2_W_0, + EVEX_LEN_0F38C7_R_6_P_2_W_1, EVEX_LEN_0F3A18_P_2_W_0, EVEX_LEN_0F3A18_P_2_W_1, EVEX_LEN_0F3A19_P_2_W_0, |