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| author | Mihail Ionescu <mihail.ionescu@arm.com> | 2019-11-12 13:55:37 +0000 |
|---|---|---|
| committer | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2019-11-12 14:01:04 +0000 |
| commit | ce760a762093d59a3faab07fff895b484071977c (patch) | |
| tree | eefed25dd6f3445f294c6df9b5eb7c32d8f0c452 /opcodes | |
| parent | f439988037a589de3798f44e7268301adaec21a9 (diff) | |
| download | gdb-ce760a762093d59a3faab07fff895b484071977c.zip gdb-ce760a762093d59a3faab07fff895b484071977c.tar.gz gdb-ce760a762093d59a3faab07fff895b484071977c.tar.bz2 | |
[binutils][arm] Update the decoding of MVE VMOV, VMVN
This patch updates the decoding of the VMOV and VMVN instructions which depend on cmode.
Previously VMOV and VMVN with cmode 1101 were not allowed.
The cmode changes also required updating of the MVE conflict checking.
Now instructions with opcodes 0xef800d50 and 0xef800e70 correctly get decoded as VMOV
and VMVN, respectively.
2019-11-12 Mihail Ionescu <mihail.ionescu@arm.com>
* opcodes/arm-dis.c (mve_opcodes): Enable VMOV imm to vec with
cmode 1101.
(is_mve_encoding_conflict): Update cmode conflict checks for
MVE_VMVN_IMM.
2019-11-12 Mihail Ionescu <mihail.ionescu@arm.com>
* gas/config/tc-arm.c (do_neon_mvn): Allow mve_ext cmode=0xd.
* testsuite/gas/arm/mve-vmov-vmvn-vorr-vbic.s: New test.
* testsuite/gas/arm/mve-vmov-vmvn-vorr-vbic.d: Likewise.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 7 | ||||
| -rw-r--r-- | opcodes/arm-dis.c | 17 |
2 files changed, 18 insertions, 6 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 454231e..62b0562 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,10 @@ +2019-11-12 Mihail Ionescu <mihail.ionescu@arm.com> + + * opcodes/arm-dis.c (mve_opcodes): Enable VMOV imm to vec with + cmode 1101. + (is_mve_encoding_conflict): Update cmode conflict checks for + MVE_VMVN_IMM. + 2019-11-12 Jan Beulich <jbeulich@suse.com> * i386-gen.c (operand_type_init): Remove OPERAND_TYPE_ESSEG diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index 8f82cb2..e04dd17 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -2842,10 +2842,15 @@ static const struct mopcode32 mve_opcodes[] = "vsri%v.%19-21s\t%13-15,22Q, %1-3,5Q, #%16-18d"}, /* Vector VMOV immediate to vector, - cmode == 11x1 -> VMVN which is UNDEFINED - for such a cmode. */ + undefinded for cmode == 1111 */ {ARM_FEATURE_COPROC (FPU_MVE), - MVE_VMVN_IMM, 0xef800d50, 0xefb81dd0, UNDEFINED_INSTRUCTION}, + MVE_VMVN_IMM, 0xef800f70, 0xefb81ff0, UNDEFINED_INSTRUCTION}, + + /* Vector VMOV immediate to vector, + cmode == 1101 */ + {ARM_FEATURE_COPROC (FPU_MVE), + MVE_VMOV_IMM_TO_VEC, 0xef800d50, 0xefb81fd0, + "vmov%v.%5,8-11s\t%13-15,22Q, %E"}, /* Vector VMOV immediate to vector. */ {ARM_FEATURE_COPROC (FPU_MVE), @@ -5664,11 +5669,11 @@ is_mve_encoding_conflict (unsigned long given, { unsigned long cmode = arm_decode_field (given, 8, 11); - if ((cmode & 9) == 1) + if (cmode == 0xe) return TRUE; - else if ((cmode & 5) == 1) + else if ((cmode & 0x9) == 1) return TRUE; - else if ((cmode & 0xe) == 0xe) + else if ((cmode & 0xd) == 9) return TRUE; else return FALSE; |