Support Intel FRED LKGS

gas/ChangeLog:

        * NEWS: Support Intel FRED LKGS.
        * config/tc-i386.c: Add fred lkgs
        * doc/c-i386.texi: Document .fred, .lkgs.
        * testsuite/gas/i386/i386.exp: Add FRED LKGS tests
        * testsuite/gas/i386/x86-64-fred-intel.d: Ditto.
        * testsuite/gas/i386/x86-64-fred.d: Ditto.
        * testsuite/gas/i386/x86-64-fred.s: Ditto.
        * testsuite/gas/i386/x86-64-lkgs-intel.d: Ditto.
        * testsuite/gas/i386/x86-64-lkgs-inval.l: Ditto.
        * testsuite/gas/i386/x86-64-lkgs-inval.s: Ditto.
        * testsuite/gas/i386/x86-64-lkgs.d: Ditto.
        * testsuite/gas/i386/x86-64-lkgs.s: Ditto.

opcodes/ChangeLog:

        * i386-dis.c: New entry for fred, lkgs.
        * i386-gen.c: Add CPU_FRED CPU_LKGS.
        * i386-init.h : Regenerated.
        * i386-mnem.h : Regenerated.
        * i386-opc.h: Add fred, lkgs.
        * i386-opc.tbl: Add FRED, LKGS instructions.
        * i386-tbl.h: Regenerated.

4 files changed, 65 insertions, 2 deletions

diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 23e8b09..07fcf32 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -1016,7 +1016,9 @@ enum
 enum
 {
   PREFIX_90 = 0,
+  PREFIX_0F00_REG_6_X86_64,
   PREFIX_0F01_REG_0_MOD_3_RM_6,
+  PREFIX_0F01_REG_1_RM_2,
   PREFIX_0F01_REG_1_RM_4,
   PREFIX_0F01_REG_1_RM_5,
   PREFIX_0F01_REG_1_RM_6,
@@ -1301,10 +1303,13 @@ enum
   X86_64_E8,
   X86_64_E9,
   X86_64_EA,
+  X86_64_0F00_REG_6,
   X86_64_0F01_REG_0,
   X86_64_0F01_REG_0_MOD_3_RM_6_P_1,
   X86_64_0F01_REG_0_MOD_3_RM_6_P_3,
   X86_64_0F01_REG_1,
+  X86_64_0F01_REG_1_RM_2_PREFIX_1,
+  X86_64_0F01_REG_1_RM_2_PREFIX_3,
   X86_64_0F01_REG_1_RM_5_PREFIX_2,
   X86_64_0F01_REG_1_RM_6_PREFIX_2,
   X86_64_0F01_REG_1_RM_7_PREFIX_2,
@@ -2746,7 +2751,7 @@ static const struct dis386 reg_table[][8] = {
     { "ltr",	{ Ew }, 0 },
     { "verr",	{ Ew }, 0 },
     { "verw",	{ Ew }, 0 },
-    { Bad_Opcode },
+    { X86_64_TABLE (X86_64_0F00_REG_6) },
     { Bad_Opcode },
   },
   /* REG_0F01 */
@@ -2987,6 +2992,14 @@ static const struct dis386 prefix_table[][4] = {
     { NULL, { { NULL, 0 } }, PREFIX_IGNORED }
   },
 
+  /* PREFIX_0F00_REG_6_X86_64 */
+  {
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { "lkgs",  { Ew }, 0 },
+  },
+
   /* PREFIX_0F01_REG_0_MOD_3_RM_6 */
   {
     { "wrmsrns",        { Skip_MODRM }, 0 },
@@ -2995,6 +3008,14 @@ static const struct dis386 prefix_table[][4] = {
     { X86_64_TABLE (X86_64_0F01_REG_0_MOD_3_RM_6_P_3) },
   },
 
+  /* PREFIX_0F01_REG_1_RM_2 */
+  {
+    { "clac",		{ Skip_MODRM }, 0 },
+    { X86_64_TABLE (X86_64_0F01_REG_1_RM_2_PREFIX_1) },
+    { Bad_Opcode },
+    { X86_64_TABLE (X86_64_0F01_REG_1_RM_2_PREFIX_3)},
+  },
+
   /* PREFIX_0F01_REG_1_RM_4 */
   {
     { Bad_Opcode },
@@ -4362,6 +4383,12 @@ static const struct dis386 x86_64_table[][2] = {
     { "{l|}jmp{P|}", { Ap }, 0 },
   },
 
+  /* X86_64_0F00_REG_6 */
+  {
+    { Bad_Opcode },
+    { PREFIX_TABLE (PREFIX_0F00_REG_6_X86_64) },
+  },
+
   /* X86_64_0F01_REG_0 */
   {
     { "sgdt{Q|Q}", { M }, 0 },
@@ -4386,6 +4413,18 @@ static const struct dis386 x86_64_table[][2] = {
     { "sidt", { M }, 0 },
   },
 
+  /* X86_64_0F01_REG_1_RM_2_PREFIX_1 */
+  {
+    { Bad_Opcode },
+    { "eretu",		{ Skip_MODRM }, 0 },
+  },
+
+  /* X86_64_0F01_REG_1_RM_2_PREFIX_3 */
+  {
+    { Bad_Opcode },
+    { "erets",		{ Skip_MODRM }, 0 },
+  },
+
   /* X86_64_0F01_REG_1_RM_5_PREFIX_2 */
   {
     { Bad_Opcode },
@@ -8693,7 +8732,7 @@ static const struct dis386 rm_table[][8] = {
     /* RM_0F01_REG_1 */
     { "monitor",	{ { OP_Monitor, 0 } }, 0 },
     { "mwait",		{ { OP_Mwait, 0 } }, 0 },
-    { "clac",		{ Skip_MODRM }, 0 },
+    { PREFIX_TABLE (PREFIX_0F01_REG_1_RM_2) },
     { "stac",		{ Skip_MODRM }, 0 },
     { PREFIX_TABLE (PREFIX_0F01_REG_1_RM_4) },
     { PREFIX_TABLE (PREFIX_0F01_REG_1_RM_5) },
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index c2ac3c6..1db555d 100644
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -164,6 +164,8 @@ static const dependency isa_dependencies[] =
     "AVX2" },
   { "AVX_NE_CONVERT",
     "AVX2" },
+  { "FRED",
+    "LKGS" },
   { "AVX512F",
     "AVX2" },
   { "AVX512CD",
@@ -362,6 +364,8 @@ static bitfield cpu_flags[] =
   BITFIELD (MSRLIST),
   BITFIELD (AVX_NE_CONVERT),
   BITFIELD (RAO_INT),
+  BITFIELD (FRED),
+  BITFIELD (LKGS),
   BITFIELD (MWAITX),
   BITFIELD (CLZERO),
   BITFIELD (OSPKE),
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index b17e834..d65392a 100644
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -229,6 +229,10 @@ enum
   CpuAVX_NE_CONVERT,
   /* Intel RAO INT Instructions support required.  */
   CpuRAO_INT,
+  /* fred instruction required */
+  CpuFRED,
+  /* lkgs instruction required */
+  CpuLKGS,
   /* mwaitx instruction required */
   CpuMWAITX,
   /* Clzero instruction required */
@@ -424,6 +428,8 @@ typedef union i386_cpu_flags
       unsigned int cpumsrlist:1;
       unsigned int cpuavx_ne_convert:1;
       unsigned int cpurao_int:1;
+      unsigned int cpufred:1;
+      unsigned int cpulkgs:1;
       unsigned int cpumwaitx:1;
       unsigned int cpuclzero:1;
       unsigned int cpuospke:1;
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index 15d48ee..c1d3233 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -3351,3 +3351,17 @@ aor, 0xf20f38fc, RAO_INT, Modrm|IgnoreSize|CheckOperandSize|NoSuf, { Reg32|Reg64
 axor, 0xf30f38fc, RAO_INT, Modrm|IgnoreSize|CheckOperandSize|NoSuf, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
 
 // RAO-INT instructions end.
+
+// LKGS instruction.
+
+lkgs, 0xf20f00/6, LKGS|x64, Modrm|IgnoreSize|No_bSuf|No_sSuf|NoRex64, { Reg16|Reg32|Reg64 }
+lkgs, 0xf20f00/6, LKGS|x64, Modrm|IgnoreSize|No_bSuf|No_lSuf|No_sSuf|No_qSuf, { Word|Unspecified|BaseIndex }
+
+// LKGS instruction end.
+
+// FRED instructions.
+
+erets, 0xf20f01ca, FRED|x64, NoSuf, {}
+eretu, 0xf30f01ca, FRED|x64, NoSuf, {}
+
+// FRED instructions end.