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authorJim Wilson <jimw@sifive.com>2018-12-03 13:59:44 -0800
committerJim Wilson <jimw@sifive.com>2018-12-03 14:05:17 -0800
commit1080bf78c05b220f5f4bbc5c50d6a0ef6490d738 (patch)
tree13e723b5e05e1858e2208b713d5bf94b38801439 /opcodes
parent57b64c4103ffeadd524eb80b4a7d61be8c8ec871 (diff)
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RISC-V: Accept version, supervisor ext and more than one NSE for -march.
This patch moves all -march parsing logic into bfd, because we will use this code in ELF attributes. bfd/ * elfxx-riscv.h (RISCV_DONT_CARE_VERSION): New macro. (struct riscv_subset_t): New structure. (riscv_subset_t): New typedef. (riscv_subset_list_t): New structure. (riscv_release_subset_list): New prototype. (riscv_add_subset): Likewise. (riscv_lookup_subset): Likewise. (riscv_lookup_subset_version): Likewise. (riscv_release_subset_list): Likewise. * elfxx-riscv.c: Include safe-ctype.h. (riscv_parsing_subset_version): New function. (riscv_supported_std_ext): Likewise. (riscv_parse_std_ext): Likewise. (riscv_parse_sv_or_non_std_ext): Likewise. (riscv_parse_subset): Likewise. (riscv_add_subset): Likewise. (riscv_lookup_subset): Likewise. (riscv_lookup_subset_version): Likewise. (riscv_release_subset_list): Likewise. gas/ * config/tc-riscv.c: Include elfxx-riscv.h. (struct riscv_subset): Removed. (riscv_subsets): Change type to riscv_subset_list_t. (riscv_subset_supports): Removed argument: xlen_required and move logic into libbfd. (riscv_multi_subset_supports): Removed argument: xlen_required. (riscv_clear_subsets): Removed. (riscv_add_subset): Ditto. (riscv_set_arch): Extract parsing logic into libbfd. (riscv_ip): Update argument for riscv_multi_subset_supports and riscv_subset_supports. Update riscv_subsets due to struct definition changed. (riscv_after_parse_args): Update riscv_subsets due to struct definition changed, update and argument for riscv_subset_supports. * testsuite/gas/riscv/empty.s: New. * testsuite/gas/riscv/march-fail-rv32ef.d: Likewise. * testsuite/gas/riscv/march-fail-rv32ef.l: Likewise. * testsuite/gas/riscv/march-fail-rv32i.d: Likewise. * testsuite/gas/riscv/march-fail-rv32i.l: Likewise. * testsuite/gas/riscv/march-fail-rv32iam.d: Likewise. * testsuite/gas/riscv/march-fail-rv32iam.l: Likewise. * testsuite/gas/riscv/march-fail-rv32ic.d: Likewise. * testsuite/gas/riscv/march-fail-rv32ic.l: Likewise. * testsuite/gas/riscv/march-fail-rv32icx2p.d: Likewise. * testsuite/gas/riscv/march-fail-rv32icx2p.l: Likewise. * testsuite/gas/riscv/march-fail-rv32imc.d: Likewise. * testsuite/gas/riscv/march-fail-rv32imc.l: Likewise. * testsuite/gas/riscv/march-fail-rv64I.d: Likewise. * testsuite/gas/riscv/march-fail-rv64I.l: Likewise. * testsuite/gas/riscv/march-fail-rv64e.d: Likewise. * testsuite/gas/riscv/march-fail-rv64e.l: Likewise. * testsuite/gas/riscv/march-ok-g2.d: Likewise. * testsuite/gas/riscv/march-ok-g2p0.d: Likewise. * testsuite/gas/riscv/march-ok-i2p0.d: Likewise. * testsuite/gas/riscv/march-ok-nse-with-version.: Likewise.d * testsuite/gas/riscv/march-ok-s-with-version.d: Likewise. * testsuite/gas/riscv/march-ok-s.d: Likewise. * testsuite/gas/riscv/march-ok-sx.d: Likewise. * testsuite/gas/riscv/march-ok-two-nse.d: Likewise. * testsuite/gas/riscv/march-ok-g2_p1.d: Likewise. * testsuite/gas/riscv/march-ok-i2p0m2_a2f2.d: Likewise. include/ * opcode/riscv.h (riscv_opcode): Change type of xlen_requirement to unsigned. opcodes/ * riscv-opc.c: Change the type of xlen, because type of xlen_requirement changed.
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog5
-rw-r--r--opcodes/riscv-dis.c2
2 files changed, 6 insertions, 1 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index a9bdb2f..b04cf0e 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2018-12-03 Kito Cheng <kito@andestech.com>
+
+ * riscv-opc.c: Change the type of xlen, because type of
+ xlen_requirement changed.
+
2018-12-03 Egeyar Bagcioglu <egeyar.bagcioglu@oracle.com>
PR 23193
diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
index 890f1f8..9790820 100644
--- a/opcodes/riscv-dis.c
+++ b/opcodes/riscv-dis.c
@@ -408,7 +408,7 @@ riscv_disassemble_insn (bfd_vma memaddr, insn_t word, disassemble_info *info)
op = riscv_hash[OP_HASH_IDX (word)];
if (op != NULL)
{
- int xlen = 0;
+ unsigned xlen = 0;
/* If XLEN is not known, get its value from the ELF class. */
if (info->mach == bfd_mach_riscv64)