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authorJan Beulich <jbeulich@suse.com>2021-04-19 15:41:35 +0200
committerJan Beulich <jbeulich@suse.com>2021-04-19 15:41:35 +0200
commitfe1640ff8ecc95beeab88f9aa6141bbeec149485 (patch)
treeddc8121d420da9b49c678a42cbd27f77eef2d114 /opcodes
parent392e0bcc0e4088ff6c31ed43a6232e709bf52751 (diff)
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arm64: add two initializers
Old enough gcc can't cope and would warn about the variables potentially remaining uninitialized.
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog6
-rw-r--r--opcodes/aarch64-asm.c4
2 files changed, 8 insertions, 2 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 452a96b..5dc51cd 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,9 @@
+2021-04-19 Jan Beulich <jbeulich@suse.com>
+
+ * aarch64-asm.c (encode_asimd_fcvt): Add initializer for
+ "qualifier".
+ (convert_mov_to_movewide): Add initializer for "value".
+
2021-04-16 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
* aarch64-opc.c: Add RME system registers.
diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c
index fa1612c..7cc8146 100644
--- a/opcodes/aarch64-asm.c
+++ b/opcodes/aarch64-asm.c
@@ -1335,7 +1335,7 @@ encode_asimd_fcvt (aarch64_inst *inst)
{
aarch64_insn value;
aarch64_field field = {0, 0};
- enum aarch64_opnd_qualifier qualifier;
+ enum aarch64_opnd_qualifier qualifier = AARCH64_OPND_QLF_NIL;
switch (inst->opcode->op)
{
@@ -1893,7 +1893,7 @@ convert_mov_to_movewide (aarch64_inst *inst)
{
int is32;
uint32_t shift_amount;
- uint64_t value;
+ uint64_t value = ~(uint64_t)0;
switch (inst->opcode->op)
{