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author | Jan Beulich <jbeulich@suse.com> | 2021-03-10 08:16:54 +0100 |
---|---|---|
committer | Jan Beulich <jbeulich@suse.com> | 2021-03-10 08:16:54 +0100 |
commit | fc681dd6a1264a1560a711a6b69cb5a229d2316a (patch) | |
tree | de3c6d563c4b6d0966ca2da84a7fc94e1f17482b /opcodes | |
parent | 13954a31199aac7d5bcb7d614f73cead4fd3d69c (diff) | |
download | gdb-fc681dd6a1264a1560a711a6b69cb5a229d2316a.zip gdb-fc681dd6a1264a1560a711a6b69cb5a229d2316a.tar.gz gdb-fc681dd6a1264a1560a711a6b69cb5a229d2316a.tar.bz2 |
x86: re-arrange order of decode for various EVEX opcodes
The order of decodes influences the overall number of table entries.
Reduce table size quite a bit by first decoding few-alternatives
attributes common to all valid leaves.
This also adds a PREFIX_DATA 7531c61332db ("x86: simplify decode of
opcodes valid with (embedded) 66 prefix only") missed to apply to
vbroadcastf64x4.
Diffstat (limited to 'opcodes')
-rw-r--r-- | opcodes/ChangeLog | 67 | ||||
-rw-r--r-- | opcodes/i386-dis-evex-len.h | 261 | ||||
-rw-r--r-- | opcodes/i386-dis-evex-mod.h | 64 | ||||
-rw-r--r-- | opcodes/i386-dis-evex-reg.h | 30 | ||||
-rw-r--r-- | opcodes/i386-dis-evex-w.h | 111 | ||||
-rw-r--r-- | opcodes/i386-dis-evex.h | 34 | ||||
-rw-r--r-- | opcodes/i386-dis.c | 121 |
7 files changed, 249 insertions, 439 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 76e8547..1fbd377 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,72 @@ 2021-03-10 Jan Beulich <jbeulich@suse.com> + * opcodes/i386-dis.c (REG_EVEX_0F38C6, REG_EVEX_0F38C7, + MOD_EVEX_0F381A_W_0, MOD_EVEX_0F381A_W_1, MOD_EVEX_0F381B_W_0, + MOD_EVEX_0F381B_W_1, MOD_EVEX_0F385A_W_0, MOD_EVEX_0F385A_W_1, + MOD_EVEX_0F385B_W_0, MOD_EVEX_0F385B_W_1, + MOD_EVEX_0F38C6_REG_1, MOD_EVEX_0F38C6_REG_2, + MOD_EVEX_0F38C6_REG_5, MOD_EVEX_0F38C6_REG_6, + MOD_EVEX_0F38C7_REG_1, MOD_EVEX_0F38C7_REG_2, + MOD_EVEX_0F38C7_REG_5, MOD_EVEX_0F38C7_REG_6 + EVEX_LEN_0F3819_W_0, EVEX_LEN_0F3819_W_1, + EVEX_LEN_0F381A_W_0_M_0, EVEX_LEN_0F381A_W_1_M_0, + EVEX_LEN_0F381B_W_0_M_0, EVEX_LEN_0F381B_W_1_M_0, + EVEX_LEN_0F385A_W_0_M_0, EVEX_LEN_0F385A_W_1_M_0, + EVEX_LEN_0F385B_W_0_M_0, EVEX_LEN_0F385B_W_1_M_0, + EVEX_LEN_0F38C6_R_1_M_0, EVEX_LEN_0F38C6_R_2_M_0, + EVEX_LEN_0F38C6_R_5_M_0, EVEX_LEN_0F38C6_R_6_M_0, + EVEX_LEN_0F38C7_R_1_M_0_W_0, EVEX_LEN_0F38C7_R_1_M_0_W_1, + EVEX_LEN_0F38C7_R_2_M_0_W_0, EVEX_LEN_0F38C7_R_2_M_0_W_1, + EVEX_LEN_0F38C7_R_5_M_0_W_0, EVEX_LEN_0F38C7_R_5_M_0_W_1, + EVEX_LEN_0F38C7_R_6_M_0_W_0, EVEX_LEN_0F38C7_R_6_M_0_W_1, + EVEX_LEN_0F3A18_W_0, EVEX_LEN_0F3A18_W_1, EVEX_LEN_0F3A19_W_0, + EVEX_LEN_0F3A19_W_1, EVEX_LEN_0F3A1A_W_0, EVEX_LEN_0F3A1A_W_1, + EVEX_LEN_0F3A1B_W_0, EVEX_LEN_0F3A1B_W_1, EVEX_LEN_0F3A23_W_0, + EVEX_LEN_0F3A23_W_1, EVEX_LEN_0F3A38_W_0, EVEX_LEN_0F3A38_W_1, + EVEX_LEN_0F3A39_W_0, EVEX_LEN_0F3A39_W_1, EVEX_LEN_0F3A3A_W_0, + EVEX_LEN_0F3A3A_W_1, EVEX_LEN_0F3A3B_W_0, EVEX_LEN_0F3A3B_W_1, + EVEX_LEN_0F3A43_W_0, EVEX_LEN_0F3A43_W_1 EVEX_W_0F3819, + EVEX_W_0F381A, EVEX_W_0F381B, EVEX_W_0F385A, EVEX_W_0F385B, + EVEX_W_0F38C7_R_1_M_0, EVEX_W_0F38C7_R_2_M_0, + EVEX_W_0F38C7_R_5_M_0, EVEX_W_0F38C7_R_6_M_0, + EVEX_W_0F3A18, EVEX_W_0F3A19, EVEX_W_0F3A1A, EVEX_W_0F3A1B, + EVEX_W_0F3A23, EVEX_W_0F3A38, EVEX_W_0F3A39, EVEX_W_0F3A3A, + EVEX_W_0F3A3B, EVEX_W_0F3A43): Delete. + REG_EVEX_0F38C6_M_0_L_2, REG_EVEX_0F38C7_M_0_L_2_W_0, + REG_EVEX_0F38C7_M_0_L_2_W_1, MOD_EVEX_0F381A, + MOD_EVEX_0F381B, MOD_EVEX_0F385A, MOD_EVEX_0F385B, + MOD_EVEX_0F38C6, MOD_EVEX_0F38C7 EVEX_LEN_0F3819, + EVEX_LEN_0F381A_M_0, EVEX_LEN_0F381B_M_0, + EVEX_LEN_0F385A_M_0, EVEX_LEN_0F385B_M_0, + EVEX_LEN_0F38C6_M_0, EVEX_LEN_0F38C7_M_0, + EVEX_LEN_0F3A18, EVEX_LEN_0F3A19, EVEX_LEN_0F3A1A, + EVEX_LEN_0F3A1B, EVEX_LEN_0F3A23, EVEX_LEN_0F3A38, + EVEX_LEN_0F3A39, EVEX_LEN_0F3A3A, EVEX_LEN_0F3A3B, + EVEX_LEN_0F3A43, EVEX_W_0F3819_L_n, EVEX_W_0F381A_M_0_L_n, + EVEX_W_0F381B_M_0_L_2, EVEX_W_0F385A_M_0_L_n, + EVEX_W_0F385B_M_0_L_2, EVEX_W_0F38C7_M_0_L_2, + EVEX_W_0F3A18_L_n, EVEX_W_0F3A19_L_n, EVEX_W_0F3A1A_L_2, + EVEX_W_0F3A1B_L_2, EVEX_W_0F3A23_L_n, EVEX_W_0F3A38_L_n, + EVEX_W_0F3A39_L_n, EVEX_W_0F3A3A_L_2, EVEX_W_0F3A3B_L_2, + EVEX_W_0F3A43_L_n): New. + * i386-dis-evex.h (evex_table): Adjust opcode 0F3819, 0F381A, + 0F381B, 0F385A, 0F385B, 0F38C7, 0F3A18, 0F3A19, 0F3A1A, 0F3A1B, + 0F3A23, 0F3A38, 0F3A39, 0F3A3A, 0F3A3B, and 0F3A43 entries. + * i386-dis-evex-len.h (evex_len_table): Link to vex_w_table[] + for opcodes 0F3819, 0F381A, 0F381B, 0F385A, 0F385B, 0F38C7, + 0F3A18, 0F3A19, 0F3A1A, 0F3A1B, 0F3A23, 0F3A38, 0F3A39, 0F3A3A, + 0F3A3B, and 0F3A43. Link to reg_table[] for opcodes 0F38C6. + * i386-dis-evex-mod.h: Adjust opcode 0F381A, 0F381B, 0F385A, + 0F385B, 0F38C6, and 0F38C7 entries. + * i386-dis-evex-reg.h: No longer link to mod_table[] for opcodes + 0F38C6 and 0F38C7. + * i386-dis-evex-w.h: No longer link to evex_len_table[] for + opcodes 0F3819, 0F38C7, 0F3A18, 0F3A19, 0F3A1A, 0F3A1B, 0F3A23, + 0F3A38, 0F3A39, 0F3A3A, 0F3A3B, and 0F3A43. No longer link to + evex_len_table[] for opcodes 0F381A, 0F381B, 0F385A, and 0F385B. + +2021-03-10 Jan Beulich <jbeulich@suse.com> + * opcodes/i386-dis.c (MOD_VEX_W_0_0F41_P_0_LEN_1, MOD_VEX_W_1_0F41_P_0_LEN_1, MOD_VEX_W_0_0F41_P_2_LEN_1, MOD_VEX_W_1_0F41_P_2_LEN_1, MOD_VEX_W_0_0F42_P_0_LEN_1, diff --git a/opcodes/i386-dis-evex-len.h b/opcodes/i386-dis-evex-len.h index ebe0945..cef8ad9 100644 --- a/opcodes/i386-dis-evex-len.h +++ b/opcodes/i386-dis-evex-len.h @@ -36,46 +36,25 @@ static const struct dis386 evex_len_table[][3] = { { "vpermp%XW", { XM, Vex, EXx }, PREFIX_DATA }, }, - /* EVEX_LEN_0F3819_W_0 */ + /* EVEX_LEN_0F3819 */ { { Bad_Opcode }, - { "vbroadcastf32x2", { XM, EXxmm_mq }, PREFIX_DATA }, - { "vbroadcastf32x2", { XM, EXxmm_mq }, PREFIX_DATA }, + { VEX_W_TABLE (EVEX_W_0F3819_L_n) }, + { VEX_W_TABLE (EVEX_W_0F3819_L_n) }, }, - /* EVEX_LEN_0F3819_W_1 */ + /* EVEX_LEN_0F381A_M_0 */ { { Bad_Opcode }, - { "vbroadcastsd", { XM, EXxmm_mq }, PREFIX_DATA }, - { "vbroadcastsd", { XM, EXxmm_mq }, PREFIX_DATA }, + { VEX_W_TABLE (EVEX_W_0F381A_M_0_L_n) }, + { VEX_W_TABLE (EVEX_W_0F381A_M_0_L_n) }, }, - /* EVEX_LEN_0F381A_W_0_M_0 */ - { - { Bad_Opcode }, - { "vbroadcastf32x4", { XM, EXxmm }, PREFIX_DATA }, - { "vbroadcastf32x4", { XM, EXxmm }, PREFIX_DATA }, - }, - - /* EVEX_LEN_0F381A_W_1_M_0 */ - { - { Bad_Opcode }, - { "vbroadcastf64x2", { XM, EXxmm }, PREFIX_DATA }, - { "vbroadcastf64x2", { XM, EXxmm }, PREFIX_DATA }, - }, - - /* EVEX_LEN_0F381B_W_0_M_0 */ + /* EVEX_LEN_0F381B_M_0 */ { { Bad_Opcode }, { Bad_Opcode }, - { "vbroadcastf32x8", { XM, EXymm }, PREFIX_DATA }, - }, - - /* EVEX_LEN_0F381B_P_2_W_1_M_0 */ - { - { Bad_Opcode }, - { Bad_Opcode }, - { "vbroadcastf64x4", { XM, EXymm }, 0 }, + { VEX_W_TABLE (EVEX_W_0F381B_M_0_L_2) }, }, /* EVEX_LEN_0F3836 */ @@ -85,116 +64,32 @@ static const struct dis386 evex_len_table[][3] = { { "vperm%DQ", { XM, Vex, EXx }, PREFIX_DATA }, }, - /* EVEX_LEN_0F385A_W_0_M_0 */ - { - { Bad_Opcode }, - { "vbroadcasti32x4", { XM, EXxmm }, PREFIX_DATA }, - { "vbroadcasti32x4", { XM, EXxmm }, PREFIX_DATA }, - }, - - /* EVEX_LEN_0F385A_W_1_M_0 */ - { - { Bad_Opcode }, - { "vbroadcasti64x2", { XM, EXxmm }, PREFIX_DATA }, - { "vbroadcasti64x2", { XM, EXxmm }, PREFIX_DATA }, - }, - - /* EVEX_LEN_0F385B_W_0_M_0 */ - { - { Bad_Opcode }, - { Bad_Opcode }, - { "vbroadcasti32x8", { XM, EXymm }, PREFIX_DATA }, - }, - - /* EVEX_LEN_0F385B_W_1_M_0 */ - { - { Bad_Opcode }, - { Bad_Opcode }, - { "vbroadcasti64x4", { XM, EXymm }, PREFIX_DATA }, - }, - - /* EVEX_LEN_0F38C6_R_1_M_0 */ - { - { Bad_Opcode }, - { Bad_Opcode }, - { "vgatherpf0dp%XW", { MVexVSIBDWpX }, PREFIX_DATA }, - }, - - /* EVEX_LEN_0F38C6_R_2_M_0 */ - { - { Bad_Opcode }, - { Bad_Opcode }, - { "vgatherpf1dp%XW", { MVexVSIBDWpX }, PREFIX_DATA }, - }, - - /* EVEX_LEN_0F38C6_R_5_M_0 */ - { - { Bad_Opcode }, - { Bad_Opcode }, - { "vscatterpf0dp%XW", { MVexVSIBDWpX }, PREFIX_DATA }, - }, - - /* EVEX_LEN_0F38C6_R_6_M_0 */ - { - { Bad_Opcode }, - { Bad_Opcode }, - { "vscatterpf1dp%XW", { MVexVSIBDWpX }, PREFIX_DATA }, - }, - - /* EVEX_LEN_0F38C7_R_1_M_0_W_0 */ - { - { Bad_Opcode }, - { Bad_Opcode }, - { "vgatherpf0qps", { MVexVSIBDQWpX }, PREFIX_DATA }, - }, - - /* EVEX_LEN_0F38C7_R_1_M_0_W_1 */ - { - { Bad_Opcode }, - { Bad_Opcode }, - { "vgatherpf0qpd", { MVexVSIBQWpX }, PREFIX_DATA }, - }, - - /* EVEX_LEN_0F38C7_R_2_M_0_W_0 */ + /* EVEX_LEN_0F385A_M_0 */ { { Bad_Opcode }, - { Bad_Opcode }, - { "vgatherpf1qps", { MVexVSIBDQWpX }, PREFIX_DATA }, + { VEX_W_TABLE (EVEX_W_0F385A_M_0_L_n) }, + { VEX_W_TABLE (EVEX_W_0F385A_M_0_L_n) }, }, - /* EVEX_LEN_0F38C7_R_2_M_0_W_1 */ + /* EVEX_LEN_0F385B_M_0 */ { { Bad_Opcode }, { Bad_Opcode }, - { "vgatherpf1qpd", { MVexVSIBQWpX }, PREFIX_DATA }, + { VEX_W_TABLE (EVEX_W_0F385B_M_0_L_2) }, }, - /* EVEX_LEN_0F38C7_R_5_M_0_W_0 */ + /* EVEX_LEN_0F38C6_M_0 */ { { Bad_Opcode }, { Bad_Opcode }, - { "vscatterpf0qps", { MVexVSIBDQWpX }, PREFIX_DATA }, + { REG_TABLE (REG_EVEX_0F38C6_M_0_L_2) }, }, - /* EVEX_LEN_0F38C7_R_5_M_0_W_1 */ + /* EVEX_LEN_0F38C7_M_0 */ { { Bad_Opcode }, { Bad_Opcode }, - { "vscatterpf0qpd", { MVexVSIBQWpX }, PREFIX_DATA }, - }, - - /* EVEX_LEN_0F38C7_R_6_M_0_W_0 */ - { - { Bad_Opcode }, - { Bad_Opcode }, - { "vscatterpf1qps", { MVexVSIBDQWpX }, PREFIX_DATA }, - }, - - /* EVEX_LEN_0F38C7_R_6_M_0_W_1 */ - { - { Bad_Opcode }, - { Bad_Opcode }, - { "vscatterpf1qpd", { MVexVSIBQWpX }, PREFIX_DATA }, + { VEX_W_TABLE (EVEX_W_0F38C7_M_0_L_2) }, }, /* EVEX_LEN_0F3A00_W_1 */ @@ -231,60 +126,32 @@ static const struct dis386 evex_len_table[][3] = { { "vextractps", { Edqd, XMM, Ib }, PREFIX_DATA }, }, - /* EVEX_LEN_0F3A18_W_0 */ - { - { Bad_Opcode }, - { "vinsertf32x4", { XM, Vex, EXxmm, Ib }, PREFIX_DATA }, - { "vinsertf32x4", { XM, Vex, EXxmm, Ib }, PREFIX_DATA }, - }, - - /* EVEX_LEN_0F3A18_W_1 */ - { - { Bad_Opcode }, - { "vinsertf64x2", { XM, Vex, EXxmm, Ib }, PREFIX_DATA }, - { "vinsertf64x2", { XM, Vex, EXxmm, Ib }, PREFIX_DATA }, - }, - - /* EVEX_LEN_0F3A19_W_0 */ - { - { Bad_Opcode }, - { "vextractf32x4", { EXxmm, XM, Ib }, PREFIX_DATA }, - { "vextractf32x4", { EXxmm, XM, Ib }, PREFIX_DATA }, - }, - - /* EVEX_LEN_0F3A19_W_1 */ - { - { Bad_Opcode }, - { "vextractf64x2", { EXxmm, XM, Ib }, PREFIX_DATA }, - { "vextractf64x2", { EXxmm, XM, Ib }, PREFIX_DATA }, - }, - - /* EVEX_LEN_0F3A1A_W_0 */ + /* EVEX_LEN_0F3A18 */ { { Bad_Opcode }, - { Bad_Opcode }, - { "vinsertf32x8", { XM, Vex, EXymm, Ib }, PREFIX_DATA }, + { VEX_W_TABLE (EVEX_W_0F3A18_L_n) }, + { VEX_W_TABLE (EVEX_W_0F3A18_L_n) }, }, - /* EVEX_LEN_0F3A1A_W_1 */ + /* EVEX_LEN_0F3A19 */ { { Bad_Opcode }, - { Bad_Opcode }, - { "vinsertf64x4", { XM, Vex, EXymm, Ib }, PREFIX_DATA }, + { VEX_W_TABLE (EVEX_W_0F3A19_L_n) }, + { VEX_W_TABLE (EVEX_W_0F3A19_L_n) }, }, - /* EVEX_LEN_0F3A1B_W_0 */ + /* EVEX_LEN_0F3A1A */ { { Bad_Opcode }, { Bad_Opcode }, - { "vextractf32x8", { EXymm, XM, Ib }, PREFIX_DATA }, + { VEX_W_TABLE (EVEX_W_0F3A1A_L_2) }, }, - /* EVEX_LEN_0F3A1B_W_1 */ + /* EVEX_LEN_0F3A1B */ { { Bad_Opcode }, { Bad_Opcode }, - { "vextractf64x4", { EXymm, XM, Ib }, PREFIX_DATA }, + { VEX_W_TABLE (EVEX_W_0F3A1B_L_2) }, }, /* EVEX_LEN_0F3A20 */ @@ -302,87 +169,45 @@ static const struct dis386 evex_len_table[][3] = { { "vpinsrK", { XM, Vex, Edq, Ib }, PREFIX_DATA }, }, - /* EVEX_LEN_0F3A23_W_0 */ - { - { Bad_Opcode }, - { "vshuff32x4", { XM, Vex, EXx, Ib }, PREFIX_DATA }, - { "vshuff32x4", { XM, Vex, EXx, Ib }, PREFIX_DATA }, - }, - - /* EVEX_LEN_0F3A23_W_1 */ - { - { Bad_Opcode }, - { "vshuff64x2", { XM, Vex, EXx, Ib }, PREFIX_DATA }, - { "vshuff64x2", { XM, Vex, EXx, Ib }, PREFIX_DATA }, - }, - - /* EVEX_LEN_0F3A38_W_0 */ - { - { Bad_Opcode }, - { "vinserti32x4", { XM, Vex, EXxmm, Ib }, PREFIX_DATA }, - { "vinserti32x4", { XM, Vex, EXxmm, Ib }, PREFIX_DATA }, - }, - - /* EVEX_LEN_0F3A38_W_1 */ + /* EVEX_LEN_0F3A23 */ { { Bad_Opcode }, - { "vinserti64x2", { XM, Vex, EXxmm, Ib }, PREFIX_DATA }, - { "vinserti64x2", { XM, Vex, EXxmm, Ib }, PREFIX_DATA }, + { VEX_W_TABLE (EVEX_W_0F3A23_L_n) }, + { VEX_W_TABLE (EVEX_W_0F3A23_L_n) }, }, - /* EVEX_LEN_0F3A39_W_0 */ + /* EVEX_LEN_0F3A38 */ { { Bad_Opcode }, - { "vextracti32x4", { EXxmm, XM, Ib }, PREFIX_DATA }, - { "vextracti32x4", { EXxmm, XM, Ib }, PREFIX_DATA }, + { VEX_W_TABLE (EVEX_W_0F3A38_L_n) }, + { VEX_W_TABLE (EVEX_W_0F3A38_L_n) }, }, - /* EVEX_LEN_0F3A39_W_1 */ + /* EVEX_LEN_0F3A39 */ { { Bad_Opcode }, - { "vextracti64x2", { EXxmm, XM, Ib }, PREFIX_DATA }, - { "vextracti64x2", { EXxmm, XM, Ib }, PREFIX_DATA }, + { VEX_W_TABLE (EVEX_W_0F3A39_L_n) }, + { VEX_W_TABLE (EVEX_W_0F3A39_L_n) }, }, - /* EVEX_LEN_0F3A3A_W_0 */ + /* EVEX_LEN_0F3A3A */ { { Bad_Opcode }, { Bad_Opcode }, - { "vinserti32x8", { XM, Vex, EXymm, Ib }, PREFIX_DATA }, + { VEX_W_TABLE (EVEX_W_0F3A3A_L_2) }, }, - /* EVEX_LEN_0F3A3A_W_1 */ + /* EVEX_LEN_0F3A3B */ { { Bad_Opcode }, { Bad_Opcode }, - { "vinserti64x4", { XM, Vex, EXymm, Ib }, PREFIX_DATA }, - }, - - /* EVEX_LEN_0F3A3B_W_0 */ - { - { Bad_Opcode }, - { Bad_Opcode }, - { "vextracti32x8", { EXymm, XM, Ib }, PREFIX_DATA }, - }, - - /* EVEX_LEN_0F3A3B_W_1 */ - { - { Bad_Opcode }, - { Bad_Opcode }, - { "vextracti64x4", { EXymm, XM, Ib }, PREFIX_DATA }, - }, - - /* EVEX_LEN_0F3A43_W_0 */ - { - { Bad_Opcode }, - { "vshufi32x4", { XM, Vex, EXx, Ib }, PREFIX_DATA }, - { "vshufi32x4", { XM, Vex, EXx, Ib }, PREFIX_DATA }, + { VEX_W_TABLE (EVEX_W_0F3A3B_L_2) }, }, - /* EVEX_LEN_0F3A43_W_1 */ + /* EVEX_LEN_0F3A43 */ { { Bad_Opcode }, - { "vshufi64x2", { XM, Vex, EXx, Ib }, PREFIX_DATA }, - { "vshufi64x2", { XM, Vex, EXx, Ib }, PREFIX_DATA }, + { VEX_W_TABLE (EVEX_W_0F3A43_L_n) }, + { VEX_W_TABLE (EVEX_W_0F3A43_L_n) }, }, }; diff --git a/opcodes/i386-dis-evex-mod.h b/opcodes/i386-dis-evex-mod.h index 4259368..a1cd69a 100644 --- a/opcodes/i386-dis-evex-mod.h +++ b/opcodes/i386-dis-evex-mod.h @@ -28,21 +28,13 @@ /* MOD_EVEX_0F2B */ { "vmovntpX", { EXx, XM }, PREFIX_OPCODE }, }, - /* MOD_EVEX_0F381A_W_0 */ + /* MOD_EVEX_0F381A */ { - { EVEX_LEN_TABLE (EVEX_LEN_0F381A_W_0_M_0) }, + { EVEX_LEN_TABLE (EVEX_LEN_0F381A_M_0) }, }, - /* MOD_EVEX_0F381A_W_1 */ + /* MOD_EVEX_0F381B */ { - { EVEX_LEN_TABLE (EVEX_LEN_0F381A_W_1_M_0) }, - }, - /* MOD_EVEX_0F381B_W_0 */ - { - { EVEX_LEN_TABLE (EVEX_LEN_0F381B_W_0_M_0) }, - }, - /* MOD_EVEX_0F381B_W_1 */ - { - { EVEX_LEN_TABLE (EVEX_LEN_0F381B_W_1_M_0) }, + { EVEX_LEN_TABLE (EVEX_LEN_0F381B_M_0) }, }, /* MOD_EVEX_0F3828_P_1 */ { @@ -64,21 +56,13 @@ { Bad_Opcode }, { "vpbroadcastmw2d", { XM, MaskE }, 0 }, }, - /* MOD_EVEX_0F385A_W_0 */ - { - { EVEX_LEN_TABLE (EVEX_LEN_0F385A_W_0_M_0) }, - }, - /* MOD_EVEX_0F385A_W_1 */ - { - { EVEX_LEN_TABLE (EVEX_LEN_0F385A_W_1_M_0) }, - }, - /* MOD_EVEX_0F385B_W_0 */ + /* MOD_EVEX_0F385A */ { - { EVEX_LEN_TABLE (EVEX_LEN_0F385B_W_0_M_0) }, + { EVEX_LEN_TABLE (EVEX_LEN_0F385A_M_0) }, }, - /* MOD_EVEX_0F385B_W_1 */ + /* MOD_EVEX_0F385B */ { - { EVEX_LEN_TABLE (EVEX_LEN_0F385B_W_1_M_0) }, + { EVEX_LEN_TABLE (EVEX_LEN_0F385B_M_0) }, }, /* MOD_EVEX_0F387A_W_0 */ { @@ -96,34 +80,10 @@ { "vpbroadcastK", { XM, Edq }, PREFIX_DATA }, }, { - /* MOD_EVEX_0F38C6_REG_1 */ - { EVEX_LEN_TABLE (EVEX_LEN_0F38C6_R_1_M_0) }, - }, - { - /* MOD_EVEX_0F38C6_REG_2 */ - { EVEX_LEN_TABLE (EVEX_LEN_0F38C6_R_2_M_0) }, - }, - { - /* MOD_EVEX_0F38C6_REG_5 */ - { EVEX_LEN_TABLE (EVEX_LEN_0F38C6_R_5_M_0) }, - }, - { - /* MOD_EVEX_0F38C6_REG_6 */ - { EVEX_LEN_TABLE (EVEX_LEN_0F38C6_R_6_M_0) }, - }, - { - /* MOD_EVEX_0F38C7_REG_1 */ - { VEX_W_TABLE (EVEX_W_0F38C7_R_1_M_0) }, - }, - { - /* MOD_EVEX_0F38C7_REG_2 */ - { VEX_W_TABLE (EVEX_W_0F38C7_R_2_M_0) }, - }, - { - /* MOD_EVEX_0F38C7_REG_5 */ - { VEX_W_TABLE (EVEX_W_0F38C7_R_5_M_0) }, + /* MOD_EVEX_0F38C6 */ + { EVEX_LEN_TABLE (EVEX_LEN_0F38C6_M_0) }, }, { - /* MOD_EVEX_0F38C7_REG_6 */ - { VEX_W_TABLE (EVEX_W_0F38C7_R_6_M_0) }, + /* MOD_EVEX_0F38C7 */ + { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_M_0) }, }, diff --git a/opcodes/i386-dis-evex-reg.h b/opcodes/i386-dis-evex-reg.h index 1ed7926..0ba1b0f 100644 --- a/opcodes/i386-dis-evex-reg.h +++ b/opcodes/i386-dis-evex-reg.h @@ -29,23 +29,33 @@ { VEX_W_TABLE (EVEX_W_0F73_R_6) }, { "vpslldq", { Vex, EXx, Ib }, PREFIX_DATA }, }, - /* REG_EVEX_0F38C6 */ + /* REG_EVEX_0F38C6_M_0_L_2 */ { { Bad_Opcode }, - { MOD_TABLE (MOD_EVEX_0F38C6_REG_1) }, - { MOD_TABLE (MOD_EVEX_0F38C6_REG_2) }, + { "vgatherpf0dp%XW", { MVexVSIBDWpX }, PREFIX_DATA }, + { "vgatherpf1dp%XW", { MVexVSIBDWpX }, PREFIX_DATA }, { Bad_Opcode }, { Bad_Opcode }, - { MOD_TABLE (MOD_EVEX_0F38C6_REG_5) }, - { MOD_TABLE (MOD_EVEX_0F38C6_REG_6) }, + { "vscatterpf0dp%XW", { MVexVSIBDWpX }, PREFIX_DATA }, + { "vscatterpf1dp%XW", { MVexVSIBDWpX }, PREFIX_DATA }, }, - /* REG_EVEX_0F38C7 */ + /* REG_EVEX_0F38C7_M_0_L_2_W_0 */ { { Bad_Opcode }, - { MOD_TABLE (MOD_EVEX_0F38C7_REG_1) }, - { MOD_TABLE (MOD_EVEX_0F38C7_REG_2) }, + { "vgatherpf0qps", { MVexVSIBDQWpX }, PREFIX_DATA }, + { "vgatherpf1qps", { MVexVSIBDQWpX }, PREFIX_DATA }, { Bad_Opcode }, { Bad_Opcode }, - { MOD_TABLE (MOD_EVEX_0F38C7_REG_5) }, - { MOD_TABLE (MOD_EVEX_0F38C7_REG_6) }, + { "vscatterpf0qps", { MVexVSIBDQWpX }, PREFIX_DATA }, + { "vscatterpf1qps", { MVexVSIBDQWpX }, PREFIX_DATA }, + }, + /* REG_EVEX_0F38C7_M_0_L_2_W_1 */ + { + { Bad_Opcode }, + { "vgatherpf0qpd", { MVexVSIBQWpX }, PREFIX_DATA }, + { "vgatherpf1qpd", { MVexVSIBQWpX }, PREFIX_DATA }, + { Bad_Opcode }, + { Bad_Opcode }, + { "vscatterpf0qpd", { MVexVSIBQWpX }, PREFIX_DATA }, + { "vscatterpf1qpd", { MVexVSIBQWpX }, PREFIX_DATA }, }, diff --git a/opcodes/i386-dis-evex-w.h b/opcodes/i386-dis-evex-w.h index a046d11..e28c845 100644 --- a/opcodes/i386-dis-evex-w.h +++ b/opcodes/i386-dis-evex-w.h @@ -390,20 +390,20 @@ { { "vpmovusqd", { EXxmmq, XM }, 0 }, }, - /* EVEX_W_0F3819 */ + /* EVEX_W_0F3819_L_n */ { - { EVEX_LEN_TABLE (EVEX_LEN_0F3819_W_0) }, - { EVEX_LEN_TABLE (EVEX_LEN_0F3819_W_1) }, + { "vbroadcastf32x2", { XM, EXxmm_mq }, PREFIX_DATA }, + { "vbroadcastsd", { XM, EXxmm_mq }, PREFIX_DATA }, }, - /* EVEX_W_0F381A */ + /* EVEX_W_0F381A_M_0_L_n */ { - { MOD_TABLE (MOD_EVEX_0F381A_W_0) }, - { MOD_TABLE (MOD_EVEX_0F381A_W_1) }, + { "vbroadcastf32x4", { XM, EXxmm }, PREFIX_DATA }, + { "vbroadcastf64x2", { XM, EXxmm }, PREFIX_DATA }, }, - /* EVEX_W_0F381B */ + /* EVEX_W_0F381B_M_0_L_2 */ { - { MOD_TABLE (MOD_EVEX_0F381B_W_0) }, - { MOD_TABLE (MOD_EVEX_0F381B_W_1) }, + { "vbroadcastf32x8", { XM, EXymm }, PREFIX_DATA }, + { "vbroadcastf64x4", { XM, EXymm }, PREFIX_DATA }, }, /* EVEX_W_0F381E */ { @@ -512,15 +512,15 @@ { "vbroadcasti32x2", { XM, EXxmm_mq }, PREFIX_DATA }, { "vpbroadcastq", { XM, EXxmm_mq }, PREFIX_DATA }, }, - /* EVEX_W_0F385A */ + /* EVEX_W_0F385A_M_0_L_n */ { - { MOD_TABLE (MOD_EVEX_0F385A_W_0) }, - { MOD_TABLE (MOD_EVEX_0F385A_W_1) }, + { "vbroadcasti32x4", { XM, EXxmm }, PREFIX_DATA }, + { "vbroadcasti64x2", { XM, EXxmm }, PREFIX_DATA }, }, - /* EVEX_W_0F385B */ + /* EVEX_W_0F385B_M_0_L_2 */ { - { MOD_TABLE (MOD_EVEX_0F385B_W_0) }, - { MOD_TABLE (MOD_EVEX_0F385B_W_1) }, + { "vbroadcasti32x8", { XM, EXymm }, PREFIX_DATA }, + { "vbroadcasti64x4", { XM, EXymm }, PREFIX_DATA }, }, /* EVEX_W_0F3870 */ { @@ -575,25 +575,10 @@ { "vscatterqps", { MVexVSIBQDWpX, XMxmmq }, PREFIX_DATA }, { "vscatterqpd", { MVexVSIBQWpX, XM }, 0 }, }, - /* EVEX_W_0F38C7_R_1_M_0 */ + /* EVEX_W_0F38C7_M_0_L_2 */ { - { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_1_M_0_W_0) }, - { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_1_M_0_W_1) }, - }, - /* EVEX_W_0F38C7_R_2_M_0 */ - { - { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_2_M_0_W_0) }, - { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_2_M_0_W_1) }, - }, - /* EVEX_W_0F38C7_R_5_M_0 */ - { - { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_5_M_0_W_0) }, - { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_5_M_0_W_1) }, - }, - /* EVEX_W_0F38C7_R_6_M_0 */ - { - { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_6_M_0_W_0) }, - { EVEX_LEN_TABLE (EVEX_LEN_0F38C7_R_6_M_0_W_1) }, + { REG_TABLE (REG_EVEX_0F38C7_M_0_L_2_W_0) }, + { REG_TABLE (REG_EVEX_0F38C7_M_0_L_2_W_1) }, }, /* EVEX_W_0F3A00 */ { @@ -628,63 +613,63 @@ { Bad_Opcode }, { "vrndscalesd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexS, Ib }, PREFIX_DATA }, }, - /* EVEX_W_0F3A18 */ + /* EVEX_W_0F3A18_L_n */ { - { EVEX_LEN_TABLE (EVEX_LEN_0F3A18_W_0) }, - { EVEX_LEN_TABLE (EVEX_LEN_0F3A18_W_1) }, + { "vinsertf32x4", { XM, Vex, EXxmm, Ib }, PREFIX_DATA }, + { "vinsertf64x2", { XM, Vex, EXxmm, Ib }, PREFIX_DATA }, }, - /* EVEX_W_0F3A19 */ + /* EVEX_W_0F3A19_L_n */ { - { EVEX_LEN_TABLE (EVEX_LEN_0F3A19_W_0) }, - { EVEX_LEN_TABLE (EVEX_LEN_0F3A19_W_1) }, + { "vextractf32x4", { EXxmm, XM, Ib }, PREFIX_DATA }, + { "vextractf64x2", { EXxmm, XM, Ib }, PREFIX_DATA }, }, - /* EVEX_W_0F3A1A */ + /* EVEX_W_0F3A1A_L_2 */ { - { EVEX_LEN_TABLE (EVEX_LEN_0F3A1A_W_0) }, - { EVEX_LEN_TABLE (EVEX_LEN_0F3A1A_W_1) }, + { "vinsertf32x8", { XM, Vex, EXymm, Ib }, PREFIX_DATA }, + { "vinsertf64x4", { XM, Vex, EXymm, Ib }, PREFIX_DATA }, }, - /* EVEX_W_0F3A1B */ + /* EVEX_W_0F3A1B_L_2 */ { - { EVEX_LEN_TABLE (EVEX_LEN_0F3A1B_W_0) }, - { EVEX_LEN_TABLE (EVEX_LEN_0F3A1B_W_1) }, + { "vextractf32x8", { EXymm, XM, Ib }, PREFIX_DATA }, + { "vextractf64x4", { EXymm, XM, Ib }, PREFIX_DATA }, }, /* EVEX_W_0F3A21 */ { { EVEX_LEN_TABLE (EVEX_LEN_0F3A21_W_0) }, }, - /* EVEX_W_0F3A23 */ + /* EVEX_W_0F3A23_L_n */ { - { EVEX_LEN_TABLE (EVEX_LEN_0F3A23_W_0) }, - { EVEX_LEN_TABLE (EVEX_LEN_0F3A23_W_1) }, + { "vshuff32x4", { XM, Vex, EXx, Ib }, PREFIX_DATA }, + { "vshuff64x2", { XM, Vex, EXx, Ib }, PREFIX_DATA }, }, - /* EVEX_W_0F3A38 */ + /* EVEX_W_0F3A38_L_n */ { - { EVEX_LEN_TABLE (EVEX_LEN_0F3A38_W_0) }, - { EVEX_LEN_TABLE (EVEX_LEN_0F3A38_W_1) }, + { "vinserti32x4", { XM, Vex, EXxmm, Ib }, PREFIX_DATA }, + { "vinserti64x2", { XM, Vex, EXxmm, Ib }, PREFIX_DATA }, }, - /* EVEX_W_0F3A39 */ + /* EVEX_W_0F3A39_L_n */ { - { EVEX_LEN_TABLE (EVEX_LEN_0F3A39_W_0) }, - { EVEX_LEN_TABLE (EVEX_LEN_0F3A39_W_1) }, + { "vextracti32x4", { EXxmm, XM, Ib }, PREFIX_DATA }, + { "vextracti64x2", { EXxmm, XM, Ib }, PREFIX_DATA }, }, - /* EVEX_W_0F3A3A */ + /* EVEX_W_0F3A3A_L_2 */ { - { EVEX_LEN_TABLE (EVEX_LEN_0F3A3A_W_0) }, - { EVEX_LEN_TABLE (EVEX_LEN_0F3A3A_W_1) }, + { "vinserti32x8", { XM, Vex, EXymm, Ib }, PREFIX_DATA }, + { "vinserti64x4", { XM, Vex, EXymm, Ib }, PREFIX_DATA }, }, - /* EVEX_W_0F3A3B */ + /* EVEX_W_0F3A3B_L_2 */ { - { EVEX_LEN_TABLE (EVEX_LEN_0F3A3B_W_0) }, - { EVEX_LEN_TABLE (EVEX_LEN_0F3A3B_W_1) }, + { "vextracti32x8", { EXymm, XM, Ib }, PREFIX_DATA }, + { "vextracti64x4", { EXymm, XM, Ib }, PREFIX_DATA }, }, /* EVEX_W_0F3A42 */ { { "vdbpsadbw", { XM, Vex, EXx, Ib }, 0 }, }, - /* EVEX_W_0F3A43 */ + /* EVEX_W_0F3A43_L_n */ { - { EVEX_LEN_TABLE (EVEX_LEN_0F3A43_W_0) }, - { EVEX_LEN_TABLE (EVEX_LEN_0F3A43_W_1) }, + { "vshufi32x4", { XM, Vex, EXx, Ib }, PREFIX_DATA }, + { "vshufi64x2", { XM, Vex, EXx, Ib }, PREFIX_DATA }, }, /* EVEX_W_0F3A70 */ { diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h index c933942..013a338 100644 --- a/opcodes/i386-dis-evex.h +++ b/opcodes/i386-dis-evex.h @@ -321,9 +321,9 @@ static const struct dis386 evex_table[][256] = { { Bad_Opcode }, /* 18 */ { VEX_W_TABLE (VEX_W_0F3818) }, - { VEX_W_TABLE (EVEX_W_0F3819) }, - { VEX_W_TABLE (EVEX_W_0F381A) }, - { VEX_W_TABLE (EVEX_W_0F381B) }, + { EVEX_LEN_TABLE (EVEX_LEN_0F3819) }, + { MOD_TABLE (MOD_EVEX_0F381A) }, + { MOD_TABLE (MOD_EVEX_0F381B) }, { "vpabsb", { XM, EXx }, PREFIX_DATA }, { "vpabsw", { XM, EXx }, PREFIX_DATA }, { VEX_W_TABLE (EVEX_W_0F381E) }, @@ -394,8 +394,8 @@ static const struct dis386 evex_table[][256] = { /* 58 */ { VEX_W_TABLE (VEX_W_0F3858) }, { VEX_W_TABLE (EVEX_W_0F3859) }, - { VEX_W_TABLE (EVEX_W_0F385A) }, - { VEX_W_TABLE (EVEX_W_0F385B) }, + { MOD_TABLE (MOD_EVEX_0F385A) }, + { MOD_TABLE (MOD_EVEX_0F385B) }, { Bad_Opcode }, { Bad_Opcode }, { Bad_Opcode }, @@ -515,8 +515,8 @@ static const struct dis386 evex_table[][256] = { { Bad_Opcode }, { "vpconflict%DQ", { XM, EXx }, PREFIX_DATA }, { Bad_Opcode }, - { REG_TABLE (REG_EVEX_0F38C6) }, - { REG_TABLE (REG_EVEX_0F38C7) }, + { MOD_TABLE (MOD_EVEX_0F38C6) }, + { MOD_TABLE (MOD_EVEX_0F38C7) }, /* C8 */ { "vexp2p%XW", { XM, EXx, EXxEVexS }, PREFIX_DATA }, { Bad_Opcode }, @@ -611,10 +611,10 @@ static const struct dis386 evex_table[][256] = { { EVEX_LEN_TABLE (EVEX_LEN_0F3A16) }, { EVEX_LEN_TABLE (EVEX_LEN_0F3A17) }, /* 18 */ - { VEX_W_TABLE (EVEX_W_0F3A18) }, - { VEX_W_TABLE (EVEX_W_0F3A19) }, - { VEX_W_TABLE (EVEX_W_0F3A1A) }, - { VEX_W_TABLE (EVEX_W_0F3A1B) }, + { EVEX_LEN_TABLE (EVEX_LEN_0F3A18) }, + { EVEX_LEN_TABLE (EVEX_LEN_0F3A19) }, + { EVEX_LEN_TABLE (EVEX_LEN_0F3A1A) }, + { EVEX_LEN_TABLE (EVEX_LEN_0F3A1B) }, { Bad_Opcode }, { VEX_W_TABLE (VEX_W_0F3A1D) }, { "vpcmpu%DQ", { XMask, Vex, EXx, VPCMP }, PREFIX_DATA }, @@ -623,7 +623,7 @@ static const struct dis386 evex_table[][256] = { { EVEX_LEN_TABLE (EVEX_LEN_0F3A20) }, { VEX_W_TABLE (EVEX_W_0F3A21) }, { EVEX_LEN_TABLE (EVEX_LEN_0F3A22) }, - { VEX_W_TABLE (EVEX_W_0F3A23) }, + { EVEX_LEN_TABLE (EVEX_LEN_0F3A23) }, { Bad_Opcode }, { "vpternlog%DQ", { XM, Vex, EXx, Ib }, PREFIX_DATA }, { "vgetmantp%XW", { XM, EXx, EXxEVexS, Ib }, PREFIX_DATA }, @@ -647,10 +647,10 @@ static const struct dis386 evex_table[][256] = { { Bad_Opcode }, { Bad_Opcode }, /* 38 */ - { VEX_W_TABLE (EVEX_W_0F3A38) }, - { VEX_W_TABLE (EVEX_W_0F3A39) }, - { VEX_W_TABLE (EVEX_W_0F3A3A) }, - { VEX_W_TABLE (EVEX_W_0F3A3B) }, + { EVEX_LEN_TABLE (EVEX_LEN_0F3A38) }, + { EVEX_LEN_TABLE (EVEX_LEN_0F3A39) }, + { EVEX_LEN_TABLE (EVEX_LEN_0F3A3A) }, + { EVEX_LEN_TABLE (EVEX_LEN_0F3A3B) }, { Bad_Opcode }, { Bad_Opcode }, { "vpcmpu%BW", { XMask, Vex, EXx, VPCMP }, PREFIX_DATA }, @@ -659,7 +659,7 @@ static const struct dis386 evex_table[][256] = { { Bad_Opcode }, { Bad_Opcode }, { VEX_W_TABLE (EVEX_W_0F3A42) }, - { VEX_W_TABLE (EVEX_W_0F3A43) }, + { EVEX_LEN_TABLE (EVEX_LEN_0F3A43) }, { "vpclmulqdq", { XM, Vex, EXx, PCLMUL }, PREFIX_DATA }, { Bad_Opcode }, { Bad_Opcode }, diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 2adf8e9..25b9c44 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -716,8 +716,9 @@ enum REG_EVEX_0F71, REG_EVEX_0F72, REG_EVEX_0F73, - REG_EVEX_0F38C6, - REG_EVEX_0F38C7 + REG_EVEX_0F38C6_M_0_L_2, + REG_EVEX_0F38C7_M_0_L_2_W_0, + REG_EVEX_0F38C7_M_0_L_2_W_1 }; enum @@ -856,29 +857,19 @@ enum MOD_EVEX_0F16_PREFIX_2, MOD_EVEX_0F17, MOD_EVEX_0F2B, - MOD_EVEX_0F381A_W_0, - MOD_EVEX_0F381A_W_1, - MOD_EVEX_0F381B_W_0, - MOD_EVEX_0F381B_W_1, + MOD_EVEX_0F381A, + MOD_EVEX_0F381B, MOD_EVEX_0F3828_P_1, MOD_EVEX_0F382A_P_1_W_1, MOD_EVEX_0F3838_P_1, MOD_EVEX_0F383A_P_1_W_0, - MOD_EVEX_0F385A_W_0, - MOD_EVEX_0F385A_W_1, - MOD_EVEX_0F385B_W_0, - MOD_EVEX_0F385B_W_1, + MOD_EVEX_0F385A, + MOD_EVEX_0F385B, MOD_EVEX_0F387A_W_0, MOD_EVEX_0F387B_W_0, MOD_EVEX_0F387C, - MOD_EVEX_0F38C6_REG_1, - MOD_EVEX_0F38C6_REG_2, - MOD_EVEX_0F38C6_REG_5, - MOD_EVEX_0F38C6_REG_6, - MOD_EVEX_0F38C7_REG_1, - MOD_EVEX_0F38C7_REG_2, - MOD_EVEX_0F38C7_REG_5, - MOD_EVEX_0F38C7_REG_6 + MOD_EVEX_0F38C6, + MOD_EVEX_0F38C7 }; enum @@ -1350,58 +1341,33 @@ enum EVEX_LEN_0FC5, EVEX_LEN_0FD6, EVEX_LEN_0F3816, - EVEX_LEN_0F3819_W_0, - EVEX_LEN_0F3819_W_1, - EVEX_LEN_0F381A_W_0_M_0, - EVEX_LEN_0F381A_W_1_M_0, - EVEX_LEN_0F381B_W_0_M_0, - EVEX_LEN_0F381B_W_1_M_0, + EVEX_LEN_0F3819, + EVEX_LEN_0F381A_M_0, + EVEX_LEN_0F381B_M_0, EVEX_LEN_0F3836, - EVEX_LEN_0F385A_W_0_M_0, - EVEX_LEN_0F385A_W_1_M_0, - EVEX_LEN_0F385B_W_0_M_0, - EVEX_LEN_0F385B_W_1_M_0, - EVEX_LEN_0F38C6_R_1_M_0, - EVEX_LEN_0F38C6_R_2_M_0, - EVEX_LEN_0F38C6_R_5_M_0, - EVEX_LEN_0F38C6_R_6_M_0, - EVEX_LEN_0F38C7_R_1_M_0_W_0, - EVEX_LEN_0F38C7_R_1_M_0_W_1, - EVEX_LEN_0F38C7_R_2_M_0_W_0, - EVEX_LEN_0F38C7_R_2_M_0_W_1, - EVEX_LEN_0F38C7_R_5_M_0_W_0, - EVEX_LEN_0F38C7_R_5_M_0_W_1, - EVEX_LEN_0F38C7_R_6_M_0_W_0, - EVEX_LEN_0F38C7_R_6_M_0_W_1, + EVEX_LEN_0F385A_M_0, + EVEX_LEN_0F385B_M_0, + EVEX_LEN_0F38C6_M_0, + EVEX_LEN_0F38C7_M_0, EVEX_LEN_0F3A00_W_1, EVEX_LEN_0F3A01_W_1, EVEX_LEN_0F3A14, EVEX_LEN_0F3A15, EVEX_LEN_0F3A16, EVEX_LEN_0F3A17, - EVEX_LEN_0F3A18_W_0, - EVEX_LEN_0F3A18_W_1, - EVEX_LEN_0F3A19_W_0, - EVEX_LEN_0F3A19_W_1, - EVEX_LEN_0F3A1A_W_0, - EVEX_LEN_0F3A1A_W_1, - EVEX_LEN_0F3A1B_W_0, - EVEX_LEN_0F3A1B_W_1, + EVEX_LEN_0F3A18, + EVEX_LEN_0F3A19, + EVEX_LEN_0F3A1A, + EVEX_LEN_0F3A1B, EVEX_LEN_0F3A20, EVEX_LEN_0F3A21_W_0, EVEX_LEN_0F3A22, - EVEX_LEN_0F3A23_W_0, - EVEX_LEN_0F3A23_W_1, - EVEX_LEN_0F3A38_W_0, - EVEX_LEN_0F3A38_W_1, - EVEX_LEN_0F3A39_W_0, - EVEX_LEN_0F3A39_W_1, - EVEX_LEN_0F3A3A_W_0, - EVEX_LEN_0F3A3A_W_1, - EVEX_LEN_0F3A3B_W_0, - EVEX_LEN_0F3A3B_W_1, - EVEX_LEN_0F3A43_W_0, - EVEX_LEN_0F3A43_W_1 + EVEX_LEN_0F3A23, + EVEX_LEN_0F3A38, + EVEX_LEN_0F3A39, + EVEX_LEN_0F3A3A, + EVEX_LEN_0F3A3B, + EVEX_LEN_0F3A43 }; enum @@ -1605,9 +1571,9 @@ enum EVEX_W_0F3813_P_2, EVEX_W_0F3814_P_1, EVEX_W_0F3815_P_1, - EVEX_W_0F3819, - EVEX_W_0F381A, - EVEX_W_0F381B, + EVEX_W_0F3819_L_n, + EVEX_W_0F381A_M_0_L_n, + EVEX_W_0F381B_M_0_L_2, EVEX_W_0F381E, EVEX_W_0F381F, EVEX_W_0F3820_P_1, @@ -1633,8 +1599,8 @@ enum EVEX_W_0F383A_P_1, EVEX_W_0F3852_P_1, EVEX_W_0F3859, - EVEX_W_0F385A, - EVEX_W_0F385B, + EVEX_W_0F385A_M_0_L_n, + EVEX_W_0F385B_M_0_L_2, EVEX_W_0F3870, EVEX_W_0F3872_P_1, EVEX_W_0F3872_P_2, @@ -1646,10 +1612,7 @@ enum EVEX_W_0F3893, EVEX_W_0F38A1, EVEX_W_0F38A3, - EVEX_W_0F38C7_R_1_M_0, - EVEX_W_0F38C7_R_2_M_0, - EVEX_W_0F38C7_R_5_M_0, - EVEX_W_0F38C7_R_6_M_0, + EVEX_W_0F38C7_M_0_L_2, EVEX_W_0F3A00, EVEX_W_0F3A01, @@ -1658,18 +1621,18 @@ enum EVEX_W_0F3A09, EVEX_W_0F3A0A, EVEX_W_0F3A0B, - EVEX_W_0F3A18, - EVEX_W_0F3A19, - EVEX_W_0F3A1A, - EVEX_W_0F3A1B, + EVEX_W_0F3A18_L_n, + EVEX_W_0F3A19_L_n, + EVEX_W_0F3A1A_L_2, + EVEX_W_0F3A1B_L_2, EVEX_W_0F3A21, - EVEX_W_0F3A23, - EVEX_W_0F3A38, - EVEX_W_0F3A39, - EVEX_W_0F3A3A, - EVEX_W_0F3A3B, + EVEX_W_0F3A23_L_n, + EVEX_W_0F3A38_L_n, + EVEX_W_0F3A39_L_n, + EVEX_W_0F3A3A_L_2, + EVEX_W_0F3A3B_L_2, EVEX_W_0F3A42, - EVEX_W_0F3A43, + EVEX_W_0F3A43_L_n, EVEX_W_0F3A70, EVEX_W_0F3A72, }; |