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authorRoland McGrath <roland@gnu.org>2012-08-07 18:22:04 +0000
committerRoland McGrath <roland@gnu.org>2012-08-07 18:22:04 +0000
commitd7189fa58ee97cd21ed0f25211b9af936a0c4abe (patch)
tree5edef028729ee04d56623efda8e1721bfe61ab6a /opcodes
parent5888842d28d8bff0732a5de1ab008944a7ad5123 (diff)
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gas/testsuite/
* gas/i386/prefetch.s: New file. * gas/i386/prefetch.d: New file. * gas/i386/prefetch-intel.d: New file. * gas/i386/x86-64-prefetch.d: New file. * gas/i386/x86-64-prefetch-intel.d: New file. * gas/i386/i386.exp: Run them. opcodes/ * i386-dis.c (reg_table): Fill out REG_0F0D table with AMD-reserved cases as "prefetch". (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants. (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise. (reg_table): Use those under REG_0F18. (mod_table): Add those cases as "nop/reserved".
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog9
-rw-r--r--opcodes/i386-dis.c30
2 files changed, 39 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 77063ce..0b55bb8 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,12 @@
+2012-08-07 Roland McGrath <mcgrathr@google.com>
+
+ * i386-dis.c (reg_table): Fill out REG_0F0D table with
+ AMD-reserved cases as "prefetch".
+ (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
+ (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
+ (reg_table): Use those under REG_0F18.
+ (mod_table): Add those cases as "nop/reserved".
+
2012-08-07 Jan Beulich <jbeulich@suse.com>
* i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index da5ede5..15c968a 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -668,6 +668,10 @@ enum
MOD_0F18_REG_1,
MOD_0F18_REG_2,
MOD_0F18_REG_3,
+ MOD_0F18_REG_4,
+ MOD_0F18_REG_5,
+ MOD_0F18_REG_6,
+ MOD_0F18_REG_7,
MOD_0F20,
MOD_0F21,
MOD_0F22,
@@ -2652,6 +2656,12 @@ static const struct dis386 reg_table[][8] = {
{
{ "prefetch", { Mb } },
{ "prefetchw", { Mb } },
+ { "prefetch", { Mb } },
+ { "prefetch", { Mb } },
+ { "prefetch", { Mb } },
+ { "prefetch", { Mb } },
+ { "prefetch", { Mb } },
+ { "prefetch", { Mb } },
},
/* REG_0F18 */
{
@@ -2659,6 +2669,10 @@ static const struct dis386 reg_table[][8] = {
{ MOD_TABLE (MOD_0F18_REG_1) },
{ MOD_TABLE (MOD_0F18_REG_2) },
{ MOD_TABLE (MOD_0F18_REG_3) },
+ { MOD_TABLE (MOD_0F18_REG_4) },
+ { MOD_TABLE (MOD_0F18_REG_5) },
+ { MOD_TABLE (MOD_0F18_REG_6) },
+ { MOD_TABLE (MOD_0F18_REG_7) },
},
/* REG_0F71 */
{
@@ -10221,6 +10235,22 @@ static const struct dis386 mod_table[][2] = {
{ "prefetcht2", { Mb } },
},
{
+ /* MOD_0F18_REG_4 */
+ { "nop/reserved", { Mb } },
+ },
+ {
+ /* MOD_0F18_REG_5 */
+ { "nop/reserved", { Mb } },
+ },
+ {
+ /* MOD_0F18_REG_6 */
+ { "nop/reserved", { Mb } },
+ },
+ {
+ /* MOD_0F18_REG_7 */
+ { "nop/reserved", { Mb } },
+ },
+ {
/* MOD_0F20 */
{ Bad_Opcode },
{ "movZ", { Rm, Cm } },