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| author | H.J. Lu <hjl.tools@gmail.com> | 2008-02-16 16:16:48 +0000 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2008-02-16 16:16:48 +0000 |
| commit | 65da13b5e0bbbc3c4ae8d3f988ca8bfb022ac30d (patch) | |
| tree | a5486180920797ae3d7a4591f2fa5853cbe737d0 /opcodes | |
| parent | eaf19029ad413850b96f97c01078e2ec567730c8 (diff) | |
| download | gdb-65da13b5e0bbbc3c4ae8d3f988ca8bfb022ac30d.zip gdb-65da13b5e0bbbc3c4ae8d3f988ca8bfb022ac30d.tar.gz gdb-65da13b5e0bbbc3c4ae8d3f988ca8bfb022ac30d.tar.bz2 | |
gas/
2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (inoutportreg): New.
(process_immext): New.
(md_assemble): Use it.
(update_imm): Use imm16 and imm32s.
(i386_att_operand): Use inoutportreg.
opcodes/
2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
* i386-init.h: Regenerated.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 5 | ||||
| -rw-r--r-- | opcodes/i386-gen.c | 2 | ||||
| -rw-r--r-- | opcodes/i386-init.h | 5 |
3 files changed, 12 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index d750f8f..e5ef349 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2008-02-16 H.J. Lu <hongjiu.lu@intel.com> + + * i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG. + * i386-init.h: Regenerated. + 2008-02-14 Nick Clifton <nickc@redhat.com> PR binutils/5524 diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index 04413dc..f7e9369 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -188,6 +188,8 @@ static initializer operand_type_init [] = "Reg32|Acc|Dword" }, { "OPERAND_TYPE_ACC64", "Reg64|Acc|Qword" }, + { "OPERAND_TYPE_INOUTPORTREG", + "InOutPortReg" }, { "OPERAND_TYPE_REG16_INOUTPORTREG", "Reg16|InOutPortReg" }, { "OPERAND_TYPE_DISP16_32", diff --git a/opcodes/i386-init.h b/opcodes/i386-init.h index 831f7f8..0c924e3 100644 --- a/opcodes/i386-init.h +++ b/opcodes/i386-init.h @@ -341,6 +341,11 @@ 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \ 0, 0, 0 } } +#define OPERAND_TYPE_INOUTPORTREG \ + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0 } } + #define OPERAND_TYPE_REG16_INOUTPORTREG \ { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |