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| author | Saravanan Ekanathan <saravanan.ekanathan@amd.com> | 2013-05-15 05:06:23 +0000 |
|---|---|---|
| committer | Saravanan Ekanathan <saravanan.ekanathan@amd.com> | 2013-05-15 05:06:23 +0000 |
| commit | 6091d6517eebfab0f172df00149dba19a2622e82 (patch) | |
| tree | f067e0c8fe115be25a6dca69bab3e0ce1cb1114b /opcodes | |
| parent | fba526b6fbd3d934e98650b899b2914e7fd1660c (diff) | |
| download | gdb-6091d6517eebfab0f172df00149dba19a2622e82.zip gdb-6091d6517eebfab0f172df00149dba19a2622e82.tar.gz gdb-6091d6517eebfab0f172df00149dba19a2622e82.tar.bz2 | |
gas/
* i386-gen.c (cpu_flag_init): Add CpuFSGSBase in CPU_BDVER3_FLAGS.
* i386-init.h: Regenerated.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 5 | ||||
| -rw-r--r-- | opcodes/i386-gen.c | 2 | ||||
| -rw-r--r-- | opcodes/i386-init.h | 2 |
3 files changed, 7 insertions, 2 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index d37be84..b4baed3 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2013-05-15 Saravanan Ekanathan <saravanan.ekanathan@amd.com> + + * i386-gen.c (cpu_flag_init): Add CpuFSGSBase in CPU_BDVER3_FLAGS. + * i386-init.h: Regenerated. + 2013-05-13 Yufeng Zhang <yufeng.zhang@arm.com> * aarch64-asm.c (aarch64_ins_advsimd_imm_modified): Remove assertion. diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index 3e7481b..7aff3fa 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -93,7 +93,7 @@ static initializer cpu_flag_init[] = { "CPU_BDVER2_FLAGS", "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuXsave|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW" }, { "CPU_BDVER3_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt" }, + "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase" }, { "CPU_BTVER1_FLAGS", "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4a|CpuABM|CpuLM|CpuPRFCHW|CpuCX16|CpuClflush|CpuFISTTP|CpuSVME|CpuLZCNT" }, { "CPU_BTVER2_FLAGS", diff --git a/opcodes/i386-init.h b/opcodes/i386-init.h index 3d48411..d5b9c15 100644 --- a/opcodes/i386-init.h +++ b/opcodes/i386-init.h @@ -172,7 +172,7 @@ #define CPU_BDVER3_FLAGS \ { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, \ 0, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, \ - 1, 1, 1, 0, 1, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 1, 0, 0, 1, \ + 1, 1, 1, 0, 1, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 1, 0, 0, 1, \ 0, 0, 0, 0 } } #define CPU_BTVER1_FLAGS \ |