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| author | Vinay Kumar <vinay.g@kpit.com> | 2015-10-27 14:00:40 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2015-10-27 14:00:40 +0000 |
| commit | 02f12cd4669463a1b2346145808213adeb303e2d (patch) | |
| tree | 173fc4a7a578830e6145027aeb31191d7229febb /opcodes | |
| parent | c6486df5f1400d90a13df5c6dbd96aeaccf8225b (diff) | |
| download | gdb-02f12cd4669463a1b2346145808213adeb303e2d.zip gdb-02f12cd4669463a1b2346145808213adeb303e2d.tar.gz gdb-02f12cd4669463a1b2346145808213adeb303e2d.tar.bz2 | |
Fix RL78 disassembly so that SP+OFFSET addressing always shows the offset, even when zero.
PR binutils/19157
opcodes * rl78-decode.opc: Add 'a' print operator to mov instructions
using stack pointer plus index addressing.
* rl78-decode.c: Regenerate.
tests * gas/rl78: New directory.
* gas/rl78/rl78.exp: New test driver.
* gas/rl78/pr19157.s: New test source file.
* gas/rl78/pr19157.d: New test case.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 7 | ||||
| -rw-r--r-- | opcodes/rl78-decode.c | 30 | ||||
| -rw-r--r-- | opcodes/rl78-decode.opc | 10 |
3 files changed, 27 insertions, 20 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 3bd728a..a2a9cd4 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,10 @@ +2015-10-27 Vinay Kumar <vinay.g@kpit.com> + + PR binutils/19157 + * rl78-decode.opc: Add 'a' print operator to mov instructions + using stack pointer plus index addressing. + * rl78-decode.c: Regenerate. + 2015-10-14 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * s390-opc.c: Fix comment. diff --git a/opcodes/rl78-decode.c b/opcodes/rl78-decode.c index 97c203d..be78c6a 100644 --- a/opcodes/rl78-decode.c +++ b/opcodes/rl78-decode.c @@ -4331,14 +4331,14 @@ rl78_decode_opcode (unsigned long pc AU, break; case 0x88: { - /** 1000 1000 mov %0, %e1 */ + /** 1000 1000 mov %0, %ea1 */ if (trace) { printf ("\033[33m%s\033[0m %02x\n", - "/** 1000 1000 mov %0, %e1 */", + "/** 1000 1000 mov %0, %ea1 */", op[0]); } - SYNTAX("mov %0, %e1"); + SYNTAX("mov %0, %ea1"); #line 666 "rl78-decode.opc" ID(mov); DR(A); SM(SP, IMMU(1)); @@ -4476,14 +4476,14 @@ rl78_decode_opcode (unsigned long pc AU, break; case 0x98: { - /** 1001 1000 mov %0, %1 */ + /** 1001 1000 mov %a0, %1 */ if (trace) { printf ("\033[33m%s\033[0m %02x\n", - "/** 1001 1000 mov %0, %1 */", + "/** 1001 1000 mov %a0, %1 */", op[0]); } - SYNTAX("mov %0, %1"); + SYNTAX("mov %a0, %1"); #line 642 "rl78-decode.opc" ID(mov); DM(SP, IMMU(1)); SR(A); @@ -4683,14 +4683,14 @@ rl78_decode_opcode (unsigned long pc AU, break; case 0xa8: { - /** 1010 1000 movw %0, %1 */ + /** 1010 1000 movw %0, %a1 */ if (trace) { printf ("\033[33m%s\033[0m %02x\n", - "/** 1010 1000 movw %0, %1 */", + "/** 1010 1000 movw %0, %a1 */", op[0]); } - SYNTAX("movw %0, %1"); + SYNTAX("movw %0, %a1"); #line 850 "rl78-decode.opc" ID(mov); W(); DR(AX); SM(SP, IMMU(1)); @@ -4889,14 +4889,14 @@ rl78_decode_opcode (unsigned long pc AU, break; case 0xb8: { - /** 1011 1000 movw %0, %1 */ + /** 1011 1000 movw %a0, %1 */ if (trace) { printf ("\033[33m%s\033[0m %02x\n", - "/** 1011 1000 movw %0, %1 */", + "/** 1011 1000 movw %a0, %1 */", op[0]); } - SYNTAX("movw %0, %1"); + SYNTAX("movw %a0, %1"); #line 831 "rl78-decode.opc" ID(mov); W(); DM(SP, IMMU(1)); SR(AX); @@ -5053,14 +5053,14 @@ rl78_decode_opcode (unsigned long pc AU, break; case 0xc8: { - /** 1100 1000 mov %0, #%1 */ + /** 1100 1000 mov %a0, #%1 */ if (trace) { printf ("\033[33m%s\033[0m %02x\n", - "/** 1100 1000 mov %0, #%1 */", + "/** 1100 1000 mov %a0, #%1 */", op[0]); } - SYNTAX("mov %0, #%1"); + SYNTAX("mov %a0, #%1"); #line 639 "rl78-decode.opc" ID(mov); DM(SP, IMMU(1)); SC(IMMU(1)); diff --git a/opcodes/rl78-decode.opc b/opcodes/rl78-decode.opc index 6475b62..8bb8d09 100644 --- a/opcodes/rl78-decode.opc +++ b/opcodes/rl78-decode.opc @@ -635,10 +635,10 @@ rl78_decode_opcode (unsigned long pc AU, /** 0110 0001 1111 1001 mov %e0, %1 */ ID(mov); DM2(HL, C, 0); SR(A); -/** 1100 1000 mov %0, #%1 */ +/** 1100 1000 mov %a0, #%1 */ ID(mov); DM(SP, IMMU(1)); SC(IMMU(1)); -/** 1001 1000 mov %0, %1 */ +/** 1001 1000 mov %a0, %1 */ ID(mov); DM(SP, IMMU(1)); SR(A); /** 1000 1111 mov %0, %e!1 */ @@ -662,7 +662,7 @@ rl78_decode_opcode (unsigned long pc AU, /** 0110 0001 1110 1001 mov %0, %e1 */ ID(mov); DR(A); SM2(HL, C, 0); -/** 1000 1000 mov %0, %e1 */ +/** 1000 1000 mov %0, %ea1 */ ID(mov); DR(A); SM(SP, IMMU(1)); /** 0101 0reg mov %0, #%1 */ @@ -827,7 +827,7 @@ rl78_decode_opcode (unsigned long pc AU, /** 1011 1100 movw %ea0, %1 */ ID(mov); W(); DM(HL, IMMU(1)); SR(AX); -/** 1011 1000 movw %0, %1 */ +/** 1011 1000 movw %a0, %1 */ ID(mov); W(); DM(SP, IMMU(1)); SR(AX); /** 1010 1111 movw %0, %e!1 */ @@ -846,7 +846,7 @@ rl78_decode_opcode (unsigned long pc AU, /** 1010 1100 movw %0, %ea1 */ ID(mov); W(); DR(AX); SM(HL, IMMU(1)); -/** 1010 1000 movw %0, %1 */ +/** 1010 1000 movw %0, %a1 */ ID(mov); W(); DR(AX); SM(SP, IMMU(1)); /** 0011 0rg0 movw %0, #%1 */ |