aboutsummaryrefslogtreecommitdiff
path: root/opcodes
diff options
context:
space:
mode:
authorNick Clifton <nickc@redhat.com>2011-07-01 16:11:27 +0000
committerNick Clifton <nickc@redhat.com>2011-07-01 16:11:27 +0000
commit5d73b1f18fc65bc905549c25db448bbcc6914c1c (patch)
treedcf60cf964ab44ec468a5b98ce633642fb00adad /opcodes
parent8adf5d7047abefaa5a11a72aeb1e58718c2230eb (diff)
downloadgdb-5d73b1f18fc65bc905549c25db448bbcc6914c1c.zip
gdb-5d73b1f18fc65bc905549c25db448bbcc6914c1c.tar.gz
gdb-5d73b1f18fc65bc905549c25db448bbcc6914c1c.tar.bz2
PR binutils/12329
* avr-dis.c (avr_operand): Fix disassembly of ELPM, LPM and SPM insns using post-increment addressing. * avr.h (AVR_ISA_AVR6): Fix typo, adding AVR_ISA_SPMX.
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog6
-rw-r--r--opcodes/arm-dis.c3
-rw-r--r--opcodes/avr-dis.c3
3 files changed, 11 insertions, 1 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 2e04791..16e9075 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,9 @@
+2011-07-01 Nick Clifton <nickc@redhat.com>
+
+ PR binutils/12329
+ * avr-dis.c (avr_operand): Fix disassembly of ELPM, LPM and SPM
+ insns using post-increment addressing.
+
2011-06-30 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (vex_len_table): Update rorxS.
diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c
index fafa7f6..2e6d4e8 100644
--- a/opcodes/arm-dis.c
+++ b/opcodes/arm-dis.c
@@ -2997,6 +2997,9 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given)
/* PC relative with immediate offset. */
bfd_vma offset = ((given & 0xf00) >> 4) | (given & 0xf);
+ if (NEGATIVE_BIT_SET)
+ offset = - offset;
+
if (PRE_BIT_SET)
{
/* Elide positive zero offset. */
diff --git a/opcodes/avr-dis.c b/opcodes/avr-dis.c
index 85d7ab3..b895ad5 100644
--- a/opcodes/avr-dis.c
+++ b/opcodes/avr-dis.c
@@ -125,7 +125,8 @@ avr_operand (unsigned int insn, unsigned int insn2, unsigned int pc, int constra
{
if (*s == '+')
{
- *buf++ = '+';
+ if (insn & (1 << (15 - (s - opcode_str))))
+ *buf++ = '+';
break;
}
}