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author | Claudiu Zissulescu <claziss@synopsys.com> | 2016-05-03 13:44:13 +0200 |
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committer | Claudiu Zissulescu <claziss@synopsys.com> | 2016-05-04 16:18:32 +0200 |
commit | 945e0f82dad31db89a107b496532886fe215c011 (patch) | |
tree | 2d9fda4f448c3e7347ffb9cad26bb9a831e70bd8 /opcodes | |
parent | edf689f02787121a49ea0e36cfaa051b06852c8b (diff) | |
download | gdb-945e0f82dad31db89a107b496532886fe215c011.zip gdb-945e0f82dad31db89a107b496532886fe215c011.tar.gz gdb-945e0f82dad31db89a107b496532886fe215c011.tar.bz2 |
[ARC] Add SYNTAX_NOP and SYNTAX_1OP for extension instructions
gas/
2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
* config/tc-arc.c (syntaxclass): Add SYNTAX_NOP and SYNTAX_1OP.
(arc_extinsn): Handle new introduced syntax.
* testsuite/gas/arc/textinsn1op.d: New file.
* testsuite/gas/arc/textinsn1op.s: Likewise.
* doc/c-arc.texi: Document SYNTAX_NOP and SYNTAX_1OP.
opcodes/
2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
* arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
(arcExtMap_genOpcode): Likewise.
* arc-opc.c (arg_32bit_rc): Define new variable.
(arg_32bit_u6): Likewise.
(arg_32bit_limm): Likewise.
include/
2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
* opcode/arc.h (ARC_SYNTAX_1OP): Declare
(ARC_SYNTAX_NOP): Likewsie.
(ARC_OP1_MUST_BE_IMM): Update defined value.
(ARC_OP1_IMM_IMPLIED): Likewise.
(arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
Diffstat (limited to 'opcodes')
-rw-r--r-- | opcodes/ChangeLog | 8 | ||||
-rw-r--r-- | opcodes/arc-ext.c | 61 | ||||
-rw-r--r-- | opcodes/arc-opc.c | 4 |
3 files changed, 66 insertions, 7 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index d166325..0313e12 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,11 @@ +2016-05-03 Claudiu Zissulescu <claziss@synopsys.com> + + * arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP. + (arcExtMap_genOpcode): Likewise. + * arc-opc.c (arg_32bit_rc): Define new variable. + (arg_32bit_u6): Likewise. + (arg_32bit_limm): Likewise. + 2016-05-03 Szabolcs Nagy <szabolcs.nagy@arm.com> * aarch64-gen.c (VERIFIER): Define. diff --git a/opcodes/arc-ext.c b/opcodes/arc-ext.c index 1d63813..f7d2191 100644 --- a/opcodes/arc-ext.c +++ b/opcodes/arc-ext.c @@ -474,12 +474,24 @@ dump_ARC_extmap (void) insn != NULL; insn = insn->next) { printf ("INST: 0x%02x 0x%02x ", insn->major, insn->minor); - if (insn->flags & ARC_SYNTAX_2OP) - printf ("SYNTAX_2OP"); - else if (insn->flags & ARC_SYNTAX_3OP) - printf ("SYNTAX_3OP"); - else - printf ("SYNTAX_UNK"); + switch (insn->flags & ARC_SYNTAX_MASK) + { + case ARC_SYNTAX_2OP: + printf ("SYNTAX_2OP"); + break; + case ARC_SYNTAX_3OP: + printf ("SYNTAX_3OP"); + break; + case ARC_SYNTAX_1OP: + printf ("SYNTAX_1OP"); + break; + case ARC_SYNTAX_NOP: + printf ("SYNTAX_NOP"); + break; + default: + printf ("SYNTAX_UNK"); + break; + } if (insn->flags & 0x10) printf ("|MODIFIER"); @@ -517,7 +529,7 @@ arcExtMap_genOpcode (const extInstruction_t *einsn, int count; /* Check for the class to see how many instructions we generate. */ - switch (einsn->flags & (ARC_SYNTAX_3OP | ARC_SYNTAX_2OP)) + switch (einsn->flags & ARC_SYNTAX_MASK) { case ARC_SYNTAX_3OP: count = (einsn->modsyn & ARC_OP1_MUST_BE_IMM) ? 10 : 20; @@ -525,6 +537,12 @@ arcExtMap_genOpcode (const extInstruction_t *einsn, case ARC_SYNTAX_2OP: count = (einsn->flags & 0x10) ? 7 : 6; break; + case ARC_SYNTAX_1OP: + count = 3; + break; + case ARC_SYNTAX_NOP: + count = 1; + break; default: count = 0; break; @@ -755,6 +773,35 @@ arcExtMap_genOpcode (const extInstruction_t *einsn, INSN3OP_C0LL (einsn->major, einsn->minor), MINSN3OP_C0LL, arc_target, arg_32bit_zalimmlimm, lflags_ccf); } + else if (einsn->flags & ARC_SYNTAX_1OP) + { + if (einsn->suffix & ARC_SUFFIX_COND) + *errmsg = "Suffix SUFFIX_COND ignored"; + + INSERT_XOP (q, einsn->name, + INSN2OP (einsn->major, 0x3F) | FIELDB (einsn->minor), + MINSN2OP_0C, arc_target, arg_32bit_rc, lflags_f); + + INSERT_XOP (q, einsn->name, + INSN2OP (einsn->major, 0x3F) | FIELDB (einsn->minor) + | (0x01 << 22), MINSN2OP_0U, arc_target, arg_32bit_u6, + lflags_f); + + INSERT_XOP (q, einsn->name, + INSN2OP (einsn->major, 0x3F) | FIELDB (einsn->minor) + | FIELDC (62), MINSN2OP_0L, arc_target, arg_32bit_limm, + lflags_f); + + } + else if (einsn->flags & ARC_SYNTAX_NOP) + { + if (einsn->suffix & ARC_SUFFIX_COND) + *errmsg = "Suffix SUFFIX_COND ignored"; + + INSERT_XOP (q, einsn->name, + INSN2OP (einsn->major, 0x3F) | FIELDB (einsn->minor) + | (0x01 << 22), MINSN2OP_0L, arc_target, arg_none, lflags_f); + } else { *errmsg = "Unknown syntax"; diff --git a/opcodes/arc-opc.c b/opcodes/arc-opc.c index 9effbaf..bbefb60 100644 --- a/opcodes/arc-opc.c +++ b/opcodes/arc-opc.c @@ -1722,6 +1722,10 @@ const unsigned char arg_32bit_limmu6[] = { LIMM, UIMM6_20 }; const unsigned char arg_32bit_limms12[] = { LIMM, SIMM12_20 }; const unsigned char arg_32bit_limmlimm[] = { LIMM, LIMMdup }; +const unsigned char arg_32bit_rc[] = { RC }; +const unsigned char arg_32bit_u6[] = { UIMM6_20 }; +const unsigned char arg_32bit_limm[] = { LIMM }; + /* The opcode table. The format of the opcode table is: |