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| author | Richard Sandiford <richard.sandiford@arm.com> | 2021-11-30 17:50:24 +0000 |
|---|---|---|
| committer | Richard Sandiford <richard.sandiford@arm.com> | 2021-11-30 17:50:24 +0000 |
| commit | 1864b6578bd96bee057ed4ce5f69917c9ad9abc9 (patch) | |
| tree | 6dc19b9e2e0f6f5b33c26f5d65f36f86730e958c /opcodes | |
| parent | 31a8056f2f519fda71682cffd0eac6ba87a59c8e (diff) | |
| download | gdb-1864b6578bd96bee057ed4ce5f69917c9ad9abc9.zip gdb-1864b6578bd96bee057ed4ce5f69917c9ad9abc9.tar.gz gdb-1864b6578bd96bee057ed4ce5f69917c9ad9abc9.tar.bz2 | |
aarch64: Mark PMSIDR_EL1 as read-only
We were incorrectly allowing writes to PMSIDR_EL1, which is
a read-only register.
[https://developer.arm.com/documentation/ddi0595/2021-09/AArch64-Registers/PMSIDR-EL1--Sampling-Profiling-ID-Register?lang=en]
opcodes/
* aarch64-opc.c (aarch64_sys_regs): Make pmsidr_el1 as F_REG_READ.
gas/
* testsuite/gas/aarch64/msr.s: Remove write to pmsidr_el1.
* testsuite/gas/aarch64/msr.d: Update accordingly.
* testsuite/gas/aarch64/illegal-sysreg-2.s,
* testsuite/gas/aarch64/illegal-sysreg-2.d,
* testsuite/gas/aarch64/illegal-sysreg-2.l: New test.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/aarch64-opc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c index 714c705..372101a 100644 --- a/opcodes/aarch64-opc.c +++ b/opcodes/aarch64-opc.c @@ -4346,7 +4346,7 @@ const aarch64_sys_reg aarch64_sys_regs [] = SR_PROFILE ("pmsfcr_el1", CPENC (3,0,C9,C9,4), 0), SR_PROFILE ("pmsevfr_el1", CPENC (3,0,C9,C9,5), 0), SR_PROFILE ("pmslatfr_el1", CPENC (3,0,C9,C9,6), 0), - SR_PROFILE ("pmsidr_el1", CPENC (3,0,C9,C9,7), 0), + SR_PROFILE ("pmsidr_el1", CPENC (3,0,C9,C9,7), F_REG_READ), SR_PROFILE ("pmscr_el2", CPENC (3,4,C9,C9,0), 0), SR_PROFILE ("pmscr_el12", CPENC (3,5,C9,C9,0), 0), SR_CORE ("pmcr_el0", CPENC (3,3,C9,C12,0), 0), |