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| author | Saravanan Ekanathan <saravanan.ekanathan@amd.com> | 2013-09-30 17:02:07 +0000 |
|---|---|---|
| committer | Saravanan Ekanathan <saravanan.ekanathan@amd.com> | 2013-09-30 17:02:07 +0000 |
| commit | c7b0bd56cec703fd6a409568946b505218defa08 (patch) | |
| tree | f5c5aeb610a169de5f2a9fe05006b8dd211c97b8 /opcodes | |
| parent | 61d82a0d7855c00ec844163e3e137a97afd72ac9 (diff) | |
| download | gdb-c7b0bd56cec703fd6a409568946b505218defa08.zip gdb-c7b0bd56cec703fd6a409568946b505218defa08.tar.gz gdb-c7b0bd56cec703fd6a409568946b505218defa08.tar.bz2 | |
Add AMD bdver4 support.
gas/
* config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
* doc/c-i386.texi: Add -march=bdver4 option.
gas/testsuite/
* gas/i386/i386.exp: Run bdver4 test cases.
* gas/i386/nops-1-bdver4.d: New.
* gas/i386/arch-10-bdver4.d: New.
* gas/i386/x86-64-nops-1-bdver4.d: New.
* gas/i386/x86-64-arch-2-bdver4.d: New.
opcodes/
* i386-gen.c (cpu_flag_init): Add CPU_BDVER4_FLAGS.
* i386-init.h: Regenerated.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 5 | ||||
| -rw-r--r-- | opcodes/i386-gen.c | 2 | ||||
| -rw-r--r-- | opcodes/i386-init.h | 6 |
3 files changed, 13 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index d218e31..3072035 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com> + + * i386-gen.c (cpu_flag_init): Add CPU_BDVER4_FLAGS. + * i386-init.h: Regenerated. + 2013-09-20 Alan Modra <amodra@gmail.com> * configure: Regenerate. diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index 115b273..0bf14d9 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -94,6 +94,8 @@ static initializer cpu_flag_init[] = "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuXsave|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW" }, { "CPU_BDVER3_FLAGS", "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase" }, + { "CPU_BDVER4_FLAGS", + "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd" }, { "CPU_BTVER1_FLAGS", "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4a|CpuABM|CpuLM|CpuPRFCHW|CpuCX16|CpuClflush|CpuFISTTP|CpuSVME|CpuLZCNT" }, { "CPU_BTVER2_FLAGS", diff --git a/opcodes/i386-init.h b/opcodes/i386-init.h index 32f8465..fa638a9 100644 --- a/opcodes/i386-init.h +++ b/opcodes/i386-init.h @@ -175,6 +175,12 @@ 1, 1, 1, 1, 1, 1, 1, 0, 1, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, \ 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0 } } +#define CPU_BDVER4_FLAGS \ + { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, \ + 0, 1, 0, 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, \ + 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, \ + 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0 } } + #define CPU_BTVER1_FLAGS \ { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, \ 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |