TRUE/FALSE simplification

There is really no need to write code like "foo != 0 ? TRUE : FALSE"
unless we had stupidly defined FALSE as something other than 0 or TRUE
as something other than 1.  The simpler "foo != 0" does just as well.
Similarly "(condition == TRUE)" or "(condition == FALSE) can be
simplified to "(condition)" and "(!condition)" respectively.

I'll note that there is reason to use "integer_expression != 0" when
assigning a bfd_boolean rather than the simpler "integer_expression",
if you expect the variable to have 0 or 1 value.  It's probably even a
good idea to not rely on implicit conversion if bfd_boolean were _Bool.

bfd/
	* aoutx.h (aout_link_write_symbols): Don't cast boolean expression
	to bfd_boolean.
	* elf32-or1k.c (or1k_set_got_and_rela_sizes): Dont compare booleans
	against FALSE.
	* elf32-arc.c (name_for_global_symbol): Don't compare boolean to TRUE.
	(is_reloc_PC_relative): Don't use "boolean_condition ? TRUE : FALSE".
	(is_reloc_SDA_relative, is_reloc_for_GOT): Likewise.
	(is_reloc_for_PLT, is_reloc_for_TLS): Likewise.
	* elf32-arm.c (stm32l4xx_need_create_replacing_stub): Likewise.
	* elf32-nds32.c (insert_nds32_elf_blank): Likewise.
	* elf32-rx.c (rx_set_section_contents): Likewise.
	* elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Likewise.
	* elfxx-mips.c (_bfd_mips_elf_ignore_undef_symbol): Likewise.
	* mach-o.c (bfd_mach_o_read_command): Likewise.
	* targets.c (bfd_get_target_info): Likewise.
binutils/
	* dlltool.c (main): Don't use "boolean_condition ? TRUE : FALSE".
	* dwarf.c (read_and_display_attr_value): Likewise.
	(display_debug_str_offsets): Likewise.
	* objdump.c (dump_bfd): Likewise.
	* readelf.c (dump_section_as_strings): Likewise.
	(dump_section_as_bytes): Likewise.
gas/
	* atof-generic.c (FALSE, TRUE): Don't define.
	* config/obj-elf.h (FALSE, TRUE): Don't define.
	* config/obj-som.h (FALSE, TRUE): Don't define.
	* config/tc-hppa.h (FALSE, TRUE): Don't define.
	* config/tc-pdp11.c (FALSE, TRUE): Don't define.
	* config/tc-iq2000.h (obj_fix_adjustable): Delete.
	* config/tc-m32r.h (TC_FIX_ADJUSTABLE): Delete.
	* config/tc-mt.h (obj_fix_adjustable): Delete.
	* config/tc-nds32.h (TC_FIX_ADJUSTABLE): Delete.
	* config/tc-arc.c (parse_opcode_flags): Simplify boolean expression.
	(relaxable_flag, relaxable_operand, assemble_insn): Likewise.
	(tokenize_extregister): Likewise.
	* config/tc-csky.c (parse_opcode, get_operand_value): Likewise.
	(parse_operands_op, parse_operands, md_assemble): Likewise.
	* config/tc-d10v.c (build_insn): Likewise.
	* config/tc-score.c (s3_gen_insn_frag): Likewise.
	* config/tc-score7.c (s7_gen_insn_frag, s7_relax_frag): Likewise.
	* config/tc-tic6x.c (tic6x_update_features, md_assemble): Likewise.
	* config/tc-z80.c (emit_byte): Likewise.
include/
	* opcode/aarch64.h (alias_opcode_p): Simplify boolean expression.
	(opcode_has_alias, pseudo_opcode_p, optional_operand_p): Likewise.
	(opcode_has_special_coder): Likewise.
ld/
	* emultempl/aix.em (gld${EMULATION_NAME}_before_allocation): Simplify
	boolean expression.
	* lexsup.c (parse_args): Likewise.
	* pe-dll.c (pe_dll_id_target): Likewise.
opcodes/
	* aarch64-opc.c (vector_qualifier_p): Simplify boolean expression.
	(fp_qualifier_p, get_data_pattern): Likewise.
	(aarch64_get_operand_modifier_from_value): Likewise.
	(aarch64_extend_operator_p, aarch64_shift_operator_p): Likewise.
	(operand_variant_qualifier_p): Likewise.
	(qualifier_value_in_range_constraint_p): Likewise.
	(aarch64_get_qualifier_esize): Likewise.
	(aarch64_get_qualifier_nelem): Likewise.
	(aarch64_get_qualifier_standard_value): Likewise.
	(get_lower_bound, get_upper_bound): Likewise.
	(aarch64_find_best_match, match_operands_qualifier): Likewise.
	(aarch64_print_operand): Likewise.
	* aarch64-opc.h (operand_has_inserter, operand_has_extractor): Likewise.
	(operand_need_sign_extension, operand_need_shift_by_two): Likewise.
	(operand_need_shift_by_four, operand_maybe_stack_pointer): Likewise.
	* arm-dis.c (print_insn_mve, print_insn_thumb32): Likewise.
	* tic6x-dis.c (tic6x_check_fetch_packet_header): Likewise.
	(print_insn_tic6x): Likewise.

5 files changed, 68 insertions, 54 deletions

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 7a531b3..ffe9337 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,5 +1,26 @@
 2021-03-29  Alan Modra  <amodra@gmail.com>
 
+	* aarch64-opc.c (vector_qualifier_p): Simplify boolean expression.
+	(fp_qualifier_p, get_data_pattern): Likewise.
+	(aarch64_get_operand_modifier_from_value): Likewise.
+	(aarch64_extend_operator_p, aarch64_shift_operator_p): Likewise.
+	(operand_variant_qualifier_p): Likewise.
+	(qualifier_value_in_range_constraint_p): Likewise.
+	(aarch64_get_qualifier_esize): Likewise.
+	(aarch64_get_qualifier_nelem): Likewise.
+	(aarch64_get_qualifier_standard_value): Likewise.
+	(get_lower_bound, get_upper_bound): Likewise.
+	(aarch64_find_best_match, match_operands_qualifier): Likewise.
+	(aarch64_print_operand): Likewise.
+	* aarch64-opc.h (operand_has_inserter, operand_has_extractor): Likewise.
+	(operand_need_sign_extension, operand_need_shift_by_two): Likewise.
+	(operand_need_shift_by_four, operand_maybe_stack_pointer): Likewise.
+	* arm-dis.c (print_insn_mve, print_insn_thumb32): Likewise.
+	* tic6x-dis.c (tic6x_check_fetch_packet_header): Likewise.
+	(print_insn_tic6x): Likewise.
+
+2021-03-29  Alan Modra  <amodra@gmail.com>
+
 	* arc-dis.c (extract_operand_value): Correct NULL cast.
 	* frv-opc.h: Regenerate.
 
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index 521ec6f..c4397bc 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -105,17 +105,15 @@ const char *const aarch64_sve_prfop_array[16] = {
 static inline bfd_boolean
 vector_qualifier_p (enum aarch64_opnd_qualifier qualifier)
 {
-  return ((qualifier >= AARCH64_OPND_QLF_V_8B
-	  && qualifier <= AARCH64_OPND_QLF_V_1Q) ? TRUE
-	  : FALSE);
+  return (qualifier >= AARCH64_OPND_QLF_V_8B
+	  && qualifier <= AARCH64_OPND_QLF_V_1Q);
 }
 
 static inline bfd_boolean
 fp_qualifier_p (enum aarch64_opnd_qualifier qualifier)
 {
-  return ((qualifier >= AARCH64_OPND_QLF_S_B
-	  && qualifier <= AARCH64_OPND_QLF_S_Q) ? TRUE
-	  : FALSE);
+  return (qualifier >= AARCH64_OPND_QLF_S_B
+	  && qualifier <= AARCH64_OPND_QLF_S_Q);
 }
 
 enum data_pattern
@@ -144,12 +142,12 @@ static const char significant_operand_index [] =
 static enum data_pattern
 get_data_pattern (const aarch64_opnd_qualifier_seq_t qualifiers)
 {
-  if (vector_qualifier_p (qualifiers[0]) == TRUE)
+  if (vector_qualifier_p (qualifiers[0]))
     {
       /* e.g. v.4s, v.4s, v.4s
 	   or v.4h, v.4h, v.h[3].  */
       if (qualifiers[0] == qualifiers[1]
-	  && vector_qualifier_p (qualifiers[2]) == TRUE
+	  && vector_qualifier_p (qualifiers[2])
 	  && (aarch64_get_qualifier_esize (qualifiers[0])
 	      == aarch64_get_qualifier_esize (qualifiers[1]))
 	  && (aarch64_get_qualifier_esize (qualifiers[0])
@@ -158,14 +156,14 @@ get_data_pattern (const aarch64_opnd_qualifier_seq_t qualifiers)
       /* e.g. v.8h, v.8b, v.8b.
            or v.4s, v.4h, v.h[2].
 	   or v.8h, v.16b.  */
-      if (vector_qualifier_p (qualifiers[1]) == TRUE
+      if (vector_qualifier_p (qualifiers[1])
 	  && aarch64_get_qualifier_esize (qualifiers[0]) != 0
 	  && (aarch64_get_qualifier_esize (qualifiers[0])
 	      == aarch64_get_qualifier_esize (qualifiers[1]) << 1))
 	return DP_VECTOR_LONG;
       /* e.g. v.8h, v.8h, v.8b.  */
       if (qualifiers[0] == qualifiers[1]
-	  && vector_qualifier_p (qualifiers[2]) == TRUE
+	  && vector_qualifier_p (qualifiers[2])
 	  && aarch64_get_qualifier_esize (qualifiers[0]) != 0
 	  && (aarch64_get_qualifier_esize (qualifiers[0])
 	      == aarch64_get_qualifier_esize (qualifiers[2]) << 1)
@@ -173,10 +171,10 @@ get_data_pattern (const aarch64_opnd_qualifier_seq_t qualifiers)
 	      == aarch64_get_qualifier_esize (qualifiers[1])))
 	return DP_VECTOR_WIDE;
     }
-  else if (fp_qualifier_p (qualifiers[0]) == TRUE)
+  else if (fp_qualifier_p (qualifiers[0]))
     {
       /* e.g. SADDLV <V><d>, <Vn>.<T>.  */
-      if (vector_qualifier_p (qualifiers[1]) == TRUE
+      if (vector_qualifier_p (qualifiers[1])
 	  && qualifiers[2] == AARCH64_OPND_QLF_NIL)
 	return DP_VECTOR_ACROSS_LANES;
     }
@@ -427,7 +425,7 @@ enum aarch64_modifier_kind
 aarch64_get_operand_modifier_from_value (aarch64_insn value,
 					 bfd_boolean extend_p)
 {
-  if (extend_p == TRUE)
+  if (extend_p)
     return AARCH64_MOD_UXTB + value;
   else
     return AARCH64_MOD_LSL - value;
@@ -436,15 +434,13 @@ aarch64_get_operand_modifier_from_value (aarch64_insn value,
 bfd_boolean
 aarch64_extend_operator_p (enum aarch64_modifier_kind kind)
 {
-  return (kind > AARCH64_MOD_LSL && kind <= AARCH64_MOD_SXTX)
-    ? TRUE : FALSE;
+  return kind > AARCH64_MOD_LSL && kind <= AARCH64_MOD_SXTX;
 }
 
 static inline bfd_boolean
 aarch64_shift_operator_p (enum aarch64_modifier_kind kind)
 {
-  return (kind >= AARCH64_MOD_ROR && kind <= AARCH64_MOD_LSL)
-    ? TRUE : FALSE;
+  return kind >= AARCH64_MOD_ROR && kind <= AARCH64_MOD_LSL;
 }
 
 const struct aarch64_name_value_pair aarch64_barrier_options[16] =
@@ -767,15 +763,13 @@ struct operand_qualifier_data aarch64_opnd_qualifiers[] =
 static inline bfd_boolean
 operand_variant_qualifier_p (aarch64_opnd_qualifier_t qualifier)
 {
-  return (aarch64_opnd_qualifiers[qualifier].kind == OQK_OPD_VARIANT)
-    ? TRUE : FALSE;
+  return aarch64_opnd_qualifiers[qualifier].kind == OQK_OPD_VARIANT;
 }
 
 static inline bfd_boolean
 qualifier_value_in_range_constraint_p (aarch64_opnd_qualifier_t qualifier)
 {
-  return (aarch64_opnd_qualifiers[qualifier].kind == OQK_VALUE_IN_RANGE)
-    ? TRUE : FALSE;
+  return aarch64_opnd_qualifiers[qualifier].kind == OQK_VALUE_IN_RANGE;
 }
 
 const char*
@@ -789,35 +783,35 @@ aarch64_get_qualifier_name (aarch64_opnd_qualifier_t qualifier)
 unsigned char
 aarch64_get_qualifier_esize (aarch64_opnd_qualifier_t qualifier)
 {
-  assert (operand_variant_qualifier_p (qualifier) == TRUE);
+  assert (operand_variant_qualifier_p (qualifier));
   return aarch64_opnd_qualifiers[qualifier].data0;
 }
 
 unsigned char
 aarch64_get_qualifier_nelem (aarch64_opnd_qualifier_t qualifier)
 {
-  assert (operand_variant_qualifier_p (qualifier) == TRUE);
+  assert (operand_variant_qualifier_p (qualifier));
   return aarch64_opnd_qualifiers[qualifier].data1;
 }
 
 aarch64_insn
 aarch64_get_qualifier_standard_value (aarch64_opnd_qualifier_t qualifier)
 {
-  assert (operand_variant_qualifier_p (qualifier) == TRUE);
+  assert (operand_variant_qualifier_p (qualifier));
   return aarch64_opnd_qualifiers[qualifier].data2;
 }
 
 static int
 get_lower_bound (aarch64_opnd_qualifier_t qualifier)
 {
-  assert (qualifier_value_in_range_constraint_p (qualifier) == TRUE);
+  assert (qualifier_value_in_range_constraint_p (qualifier));
   return aarch64_opnd_qualifiers[qualifier].data0;
 }
 
 static int
 get_upper_bound (aarch64_opnd_qualifier_t qualifier)
 {
-  assert (qualifier_value_in_range_constraint_p (qualifier) == TRUE);
+  assert (qualifier_value_in_range_constraint_p (qualifier));
   return aarch64_opnd_qualifiers[qualifier].data1;
 }
 
@@ -951,7 +945,7 @@ aarch64_find_best_match (const aarch64_inst *inst,
 
       /* Most opcodes has much fewer patterns in the list.
 	 First NIL qualifier indicates the end in the list.   */
-      if (empty_qualifier_sequence_p (qualifiers) == TRUE)
+      if (empty_qualifier_sequence_p (qualifiers))
 	{
 	  DEBUG_TRACE_IF (i == 0, "SUCCEED: empty qualifier list");
 	  if (i)
@@ -1023,7 +1017,7 @@ aarch64_find_best_match (const aarch64_inst *inst,
    Return 1 if the operand qualifier(s) in *INST match one of the qualifier
    sequences in INST->OPCODE->qualifiers_list; otherwise return 0.
 
-   if UPDATE_P == TRUE, update the qualifier(s) in *INST after the matching
+   if UPDATE_P, update the qualifier(s) in *INST after the matching
    succeeds.  */
 
 static int
@@ -1049,7 +1043,7 @@ match_operands_qualifier (aarch64_inst *inst, bfd_boolean update_p)
     }
 
   /* Update the qualifiers.  */
-  if (update_p == TRUE)
+  if (update_p)
     for (i = 0; i < AARCH64_MAX_OPND_NUM; ++i)
       {
 	if (inst->opcode->operands[i] == AARCH64_OPND_NIL)
@@ -3539,7 +3533,7 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
     case AARCH64_OPND_UIMM4_ADDG:
     case AARCH64_OPND_UIMM7:
     case AARCH64_OPND_UIMM10:
-      if (optional_operand_p (opcode, idx) == TRUE
+      if (optional_operand_p (opcode, idx)
 	  && (opnd->imm.value ==
 	      (int64_t) get_optional_operand_default_value (opcode)))
 	/* Omit the operand, e.g. DCPS1.  */
diff --git a/opcodes/aarch64-opc.h b/opcodes/aarch64-opc.h
index 5366e9d..82f64c2 100644
--- a/opcodes/aarch64-opc.h
+++ b/opcodes/aarch64-opc.h
@@ -245,37 +245,37 @@ verify_constraints (const struct aarch64_inst *, const aarch64_insn, bfd_vma,
 static inline bfd_boolean
 operand_has_inserter (const aarch64_operand *operand)
 {
-  return (operand->flags & OPD_F_HAS_INSERTER) ? TRUE : FALSE;
+  return (operand->flags & OPD_F_HAS_INSERTER) != 0;
 }
 
 static inline bfd_boolean
 operand_has_extractor (const aarch64_operand *operand)
 {
-  return (operand->flags & OPD_F_HAS_EXTRACTOR) ? TRUE : FALSE;
+  return (operand->flags & OPD_F_HAS_EXTRACTOR) != 0;
 }
 
 static inline bfd_boolean
 operand_need_sign_extension (const aarch64_operand *operand)
 {
-  return (operand->flags & OPD_F_SEXT) ? TRUE : FALSE;
+  return (operand->flags & OPD_F_SEXT) != 0;
 }
 
 static inline bfd_boolean
 operand_need_shift_by_two (const aarch64_operand *operand)
 {
-  return (operand->flags & OPD_F_SHIFT_BY_2) ? TRUE : FALSE;
+  return (operand->flags & OPD_F_SHIFT_BY_2) != 0;
 }
 
 static inline bfd_boolean
 operand_need_shift_by_four (const aarch64_operand *operand)
 {
-  return (operand->flags & OPD_F_SHIFT_BY_4) ? TRUE : FALSE;
+  return (operand->flags & OPD_F_SHIFT_BY_4) != 0;
 }
 
 static inline bfd_boolean
 operand_maybe_stack_pointer (const aarch64_operand *operand)
 {
-  return (operand->flags & OPD_F_MAYBE_SP) ? TRUE : FALSE;
+  return (operand->flags & OPD_F_MAYBE_SP) != 0;
 }
 
 /* Return the value of the operand-specific data field (OPD_F_OD_MASK).  */
diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c
index 9647d00..2f3f19b 100644
--- a/opcodes/arm-dis.c
+++ b/opcodes/arm-dis.c
@@ -9887,11 +9887,11 @@ print_insn_mve (struct disassemble_info *info, long given)
 	  if (is_undefined)
 	    print_mve_undefined (info, undefined_cond);
 
-	  if ((vpt_block_state.in_vpt_block == FALSE)
+	  if (!vpt_block_state.in_vpt_block
 	      && !ifthen_state
-	      && (is_vpt_instruction (given) == TRUE))
+	      && is_vpt_instruction (given))
 	    mark_inside_vpt_block (given);
-	  else if (vpt_block_state.in_vpt_block == TRUE)
+	  else if (vpt_block_state.in_vpt_block)
 	    update_vpt_block_state ();
 
 	  return TRUE;
@@ -10841,7 +10841,7 @@ print_insn_thumb32 (bfd_vma pc, struct disassemble_info *info, long given)
   if (print_insn_coprocessor (pc, info, given, TRUE))
     return;
 
-  if ((is_mve == FALSE) && print_insn_neon (info, given, TRUE))
+  if (!is_mve && print_insn_neon (info, given, TRUE))
     return;
 
   if (is_mve && print_insn_mve (info, given))
diff --git a/opcodes/tic6x-dis.c b/opcodes/tic6x-dis.c
index 53d11a2..3b5eea1 100644
--- a/opcodes/tic6x-dis.c
+++ b/opcodes/tic6x-dis.c
@@ -214,17 +214,16 @@ tic6x_check_fetch_packet_header (unsigned char *fp,
 
   for (i = 0; i < 7; i++)
     header->word_compact[i]
-      = (header->header & (1u << (21 + i))) ? TRUE : FALSE;
+      = (header->header & (1u << (21 + i))) != 0;
 
-  header->prot = (header->header & (1u << 20)) ? TRUE : FALSE;
-  header->rs = (header->header & (1u << 19)) ? TRUE : FALSE;
+  header->prot = (header->header & (1u << 20)) != 0;
+  header->rs = (header->header & (1u << 19)) != 0;
   header->dsz = (header->header >> 16) & 0x7;
-  header->br = (header->header & (1u << 15)) ? TRUE : FALSE;
-  header->sat = (header->header & (1u << 14)) ? TRUE : FALSE;
+  header->br = (header->header & (1u << 15)) != 0;
+  header->sat = (header->header & (1u << 14)) != 0;
 
   for (i = 0; i < 14; i++)
-    header->p_bits[i]
-      = (header->header & (1u << i)) ? TRUE : FALSE;
+    header->p_bits[i] = (header->header & (1u << i)) != 0;
 
   return TRUE;
 }
@@ -490,7 +489,7 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
 	    {
 	      unsigned int prev_opcode
 		= tic6x_extract_32 (fp + (fp_offset & 0x1c) - 4, info);
-	      p_bit = (prev_opcode & 0x1) ? TRUE : FALSE;
+	      p_bit = (prev_opcode & 0x1) != 0;
 	    }
 	}
       else
@@ -518,14 +517,14 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
 		    {
 		      unsigned int prev_opcode = tic6x_extract_32 (fp_prev + 24,
 								   info);
-		      p_bit = (prev_opcode & 0x1) ? TRUE : FALSE;
+		      p_bit = (prev_opcode & 0x1) != 0;
 		    }
 		}
 	      else
 		{
 		  unsigned int prev_opcode = tic6x_extract_32 (fp_prev + 28,
 							       info);
-		  p_bit = (prev_opcode & 0x1) ? TRUE : FALSE;
+		  p_bit = (prev_opcode & 0x1) != 0;
 		}
 	    }
 	}
@@ -654,7 +653,7 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
 		  printf ("opcode %x: illegal cross path specifier in adda opcode!\n", opcode);
 		  abort ();
 		}
-	      func_unit_cross = (func_unit_side == 1 ? TRUE : FALSE);
+	      func_unit_cross = func_unit_side == 1;
 	    }
 
 	  switch (opc->func_unit)
@@ -1344,7 +1343,7 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
 		  side = func_unit_side == 2 ? 'b' : 'a';
 		  snprintf (base, 4, "%c%u", side, mem_base_reg);
 
-		  offset_is_reg = ((mem_mode & 4) ? TRUE : FALSE);
+		  offset_is_reg = (mem_mode & 4) != 0;
 		  if (offset_is_reg)
 		    {
 
@@ -1355,7 +1354,7 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
 		      snprintf (offset, 4, "%c%u", side, reg_base + mem_offset);
 		      if (opc->operand_info[op_num].form
 			  == tic6x_operand_mem_ndw)
-			offset_scaled = mem_scaled ? TRUE : FALSE;
+			offset_scaled = mem_scaled != 0;
 		      else
 			offset_scaled = TRUE;
 		    }
@@ -1364,7 +1363,7 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info)
 		      if (opc->operand_info[op_num].form
 			  == tic6x_operand_mem_ndw)
 			{
-			  offset_scaled = mem_scaled ? TRUE : FALSE;
+			  offset_scaled = mem_scaled != 0;
 			  snprintf (offset, 4, "%u", mem_offset);
 			}
 		      else