Wed Jul 17 10:12:05 1996 J.T. Conklin <jtc@rtl.cygnus.com>

        * m68k-opc.c (m68k_opcodes): Fix bugs in coldfire insns relating
        to bcc, trapfl, subxl, and wddata discovered by Andreas Schwab.

2 files changed, 76 insertions, 71 deletions

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index b65dc12..6062551 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+Wed Jul 17 10:12:05 1996  J.T. Conklin  <jtc@rtl.cygnus.com>
+
+	* m68k-opc.c (m68k_opcodes): Fix bugs in coldfire insns relating
+ 	to bcc, trapfl, subxl, and wddata discovered by Andreas Schwab.
+
 Mon Jul 15 16:59:55 1996  Stu Grossman  (grossman@critters.cygnus.com)
 
 	* i386-dis.c:  Get rid of print_insn_i8086.  Use info.mach to
diff --git a/opcodes/m68k-opc.c b/opcodes/m68k-opc.c
index d5bc773..dec6b3f 100644
--- a/opcodes/m68k-opc.c
+++ b/opcodes/m68k-opc.c
@@ -125,35 +125,35 @@ const struct m68k_opcode m68k_opcodes[] =
 {"bgtw",	one(0067000),	one(0177777), "BW", m68000up | mcf5200 },
 {"blew",	one(0067400),	one(0177777), "BW", m68000up | mcf5200 },
 
-{"bhil",	one(0061377),	one(0177777), "BL", m68020up | cpu32 | mcf5200 },
-{"blsl",	one(0061777),	one(0177777), "BL", m68020up | cpu32 | mcf5200 },
-{"bccl",	one(0062377),	one(0177777), "BL", m68020up | cpu32 | mcf5200 },
-{"bcsl",	one(0062777),	one(0177777), "BL", m68020up | cpu32 | mcf5200 },
-{"bnel",	one(0063377),	one(0177777), "BL", m68020up | cpu32 | mcf5200 },
-{"beql",	one(0063777),	one(0177777), "BL", m68020up | cpu32 | mcf5200 },
-{"bvcl",	one(0064377),	one(0177777), "BL", m68020up | cpu32 | mcf5200 },
-{"bvsl",	one(0064777),	one(0177777), "BL", m68020up | cpu32 | mcf5200 },
-{"bpll",	one(0065377),	one(0177777), "BL", m68020up | cpu32 | mcf5200 },
-{"bmil",	one(0065777),	one(0177777), "BL", m68020up | cpu32 | mcf5200 },
-{"bgel",	one(0066377),	one(0177777), "BL", m68020up | cpu32 | mcf5200 },
-{"bltl",	one(0066777),	one(0177777), "BL", m68020up | cpu32 | mcf5200 },
-{"bgtl",	one(0067377),	one(0177777), "BL", m68020up | cpu32 | mcf5200 },
-{"blel",	one(0067777),	one(0177777), "BL", m68020up | cpu32 | mcf5200 },
-
-{"bhis",	one(0061000),	one(0177400), "BB", m68000up },
-{"blss",	one(0061400),	one(0177400), "BB", m68000up },
-{"bccs",	one(0062000),	one(0177400), "BB", m68000up },
-{"bcss",	one(0062400),	one(0177400), "BB", m68000up },
-{"bnes",	one(0063000),	one(0177400), "BB", m68000up },
-{"beqs",	one(0063400),	one(0177400), "BB", m68000up },
-{"bvcs",	one(0064000),	one(0177400), "BB", m68000up },
-{"bvss",	one(0064400),	one(0177400), "BB", m68000up },
-{"bpls",	one(0065000),	one(0177400), "BB", m68000up },
-{"bmis",	one(0065400),	one(0177400), "BB", m68000up },
-{"bges",	one(0066000),	one(0177400), "BB", m68000up },
-{"blts",	one(0066400),	one(0177400), "BB", m68000up },
-{"bgts",	one(0067000),	one(0177400), "BB", m68000up },
-{"bles",	one(0067400),	one(0177400), "BB", m68000up },
+{"bhil",	one(0061377),	one(0177777), "BL", m68020up | cpu32 },
+{"blsl",	one(0061777),	one(0177777), "BL", m68020up | cpu32 },
+{"bccl",	one(0062377),	one(0177777), "BL", m68020up | cpu32 },
+{"bcsl",	one(0062777),	one(0177777), "BL", m68020up | cpu32 },
+{"bnel",	one(0063377),	one(0177777), "BL", m68020up | cpu32 },
+{"beql",	one(0063777),	one(0177777), "BL", m68020up | cpu32 },
+{"bvcl",	one(0064377),	one(0177777), "BL", m68020up | cpu32 },
+{"bvsl",	one(0064777),	one(0177777), "BL", m68020up | cpu32 },
+{"bpll",	one(0065377),	one(0177777), "BL", m68020up | cpu32 },
+{"bmil",	one(0065777),	one(0177777), "BL", m68020up | cpu32 },
+{"bgel",	one(0066377),	one(0177777), "BL", m68020up | cpu32 },
+{"bltl",	one(0066777),	one(0177777), "BL", m68020up | cpu32 },
+{"bgtl",	one(0067377),	one(0177777), "BL", m68020up | cpu32 },
+{"blel",	one(0067777),	one(0177777), "BL", m68020up | cpu32 },
+
+{"bhis",	one(0061000),	one(0177400), "BB", m68000up | mcf5200 },
+{"blss",	one(0061400),	one(0177400), "BB", m68000up | mcf5200 },
+{"bccs",	one(0062000),	one(0177400), "BB", m68000up | mcf5200 },
+{"bcss",	one(0062400),	one(0177400), "BB", m68000up | mcf5200 },
+{"bnes",	one(0063000),	one(0177400), "BB", m68000up | mcf5200 },
+{"beqs",	one(0063400),	one(0177400), "BB", m68000up | mcf5200 },
+{"bvcs",	one(0064000),	one(0177400), "BB", m68000up | mcf5200 },
+{"bvss",	one(0064400),	one(0177400), "BB", m68000up | mcf5200 },
+{"bpls",	one(0065000),	one(0177400), "BB", m68000up | mcf5200 },
+{"bmis",	one(0065400),	one(0177400), "BB", m68000up | mcf5200 },
+{"bges",	one(0066000),	one(0177400), "BB", m68000up | mcf5200 },
+{"blts",	one(0066400),	one(0177400), "BB", m68000up | mcf5200 },
+{"bgts",	one(0067000),	one(0177400), "BB", m68000up | mcf5200 },
+{"bles",	one(0067400),	one(0177400), "BB", m68000up | mcf5200 },
 
 {"jhi",		one(0061000),	one(0177400), "Bg", m68000up | mcf5200 },
 {"jls",		one(0061400),	one(0177400), "Bg", m68000up | mcf5200 },
@@ -330,9 +330,9 @@ const struct m68k_opcode m68k_opcodes[] =
 {"exg",		one(0140610),	one(0170770), "DdAs", m68000up },
 {"exg",		one(0140610),	one(0170770), "AsDd", m68000up },
 
-{"extw",	one(0044200),	one(0177770), "Ds", m68000up | mcf5200 },
-{"extl",	one(0044300),	one(0177770), "Ds", m68000up | mcf5200 },
-{"extbl",	one(0044700),	one(0177770), "Ds", m68020up | cpu32 | mcf5200 },
+{"extw",	one(0044200),	one(0177770), "Ds", m68000up|mcf5200 },
+{"extl",	one(0044300),	one(0177770), "Ds", m68000up|mcf5200 },
+{"extbl",	one(0044700),	one(0177770), "Ds", m68020up|cpu32|mcf5200 },
 
 /* float stuff starts here */
 
@@ -1402,7 +1402,7 @@ const struct m68k_opcode m68k_opcodes[] =
 {"pdbwc",	two(0xf048, 0x0009),	two(0xfff8, 0xffff), "DsBw", m68851 },
 {"pdbws",	two(0xf048, 0x0008),	two(0xfff8, 0xffff), "DsBw", m68851 },
 
-{"pea",		one(0044100),		one(0177700), "!s", m68000up | mcf5200 },
+{"pea",		one(0044100),		one(0177700), "!s", m68000up|mcf5200 },
 
 {"pflusha",	two(0xf000,0x2400), two(0xffff,0xffff), "", m68030 | m68851 },
 {"pflusha",	one(0xf518),		one(0xfff8), "", m68040up },
@@ -1603,13 +1603,13 @@ const struct m68k_opcode m68k_opcodes[] =
 
 {"rtd",		one(0047164),		one(0177777), "#w", m68010up },
 
-{"rte",		one(0047163),		one(0177777), "",   m68000up | mcf5200 },
+{"rte",		one(0047163),		one(0177777), "",   m68000up|mcf5200 },
 
 {"rtm",		one(0003300),		one(0177760), "Rs", m68020 },
 
 {"rtr",		one(0047167),		one(0177777), "",   m68000up },
 
-{"rts",		one(0047165),		one(0177777), "",   m68000up | mcf5200 },
+{"rts",		one(0047165),		one(0177777), "",   m68000up|mcf5200 },
 
 {"sbcd",	one(0100400),		one(0170770), "DsDd", m68000up },
 {"sbcd",	one(0100410),		one(0170770), "-s-d", m68000up },
@@ -1665,7 +1665,7 @@ const struct m68k_opcode m68k_opcodes[] =
 {"subxw",	one(0110500),	one(0170770), "DsDd", m68000up },
 {"subxw",	one(0110510),	one(0170770), "-s-d", m68000up },
 {"subxl",	one(0110600),	one(0170770), "DsDd", m68000up | mcf5200 },
-{"subxl",	one(0110610),	one(0170770), "-s-d", m68000up | mcf5200 },
+{"subxl",	one(0110610),	one(0170770), "-s-d", m68000up },
 
 {"swap",	one(0044100),	one(0177770), "Ds", m68000up | mcf5200 },
 
@@ -1702,39 +1702,39 @@ TBL("tblunb", "tblunw", "tblunl", 0, 0),
 {"trapvc",	one(0054374),	one(0177777), "", m68020up | cpu32 },
 {"trapvs",	one(0054774),	one(0177777), "", m68020up | cpu32 },
 
-{"trapccw",	one(0052372),	one(0177777), "#w", m68020up | cpu32 },
-{"trapcsw",	one(0052772),	one(0177777), "#w", m68020up | cpu32 },
-{"trapeqw",	one(0053772),	one(0177777), "#w", m68020up | cpu32 },
-{"trapfw",	one(0050772),	one(0177777), "#w", m68020up | cpu32 | mcf5200},
-{"trapgew",	one(0056372),	one(0177777), "#w", m68020up | cpu32 },
-{"trapgtw",	one(0057372),	one(0177777), "#w", m68020up | cpu32 },
-{"traphiw",	one(0051372),	one(0177777), "#w", m68020up | cpu32 },
-{"traplew",	one(0057772),	one(0177777), "#w", m68020up | cpu32 },
-{"traplsw",	one(0051772),	one(0177777), "#w", m68020up | cpu32 },
-{"trapltw",	one(0056772),	one(0177777), "#w", m68020up | cpu32 },
-{"trapmiw",	one(0055772),	one(0177777), "#w", m68020up | cpu32 },
-{"trapnew",	one(0053372),	one(0177777), "#w", m68020up | cpu32 },
-{"trapplw",	one(0055372),	one(0177777), "#w", m68020up | cpu32 },
-{"traptw",	one(0050372),	one(0177777), "#w", m68020up | cpu32 },
-{"trapvcw",	one(0054372),	one(0177777), "#w", m68020up | cpu32 },
-{"trapvsw",	one(0054772),	one(0177777), "#w", m68020up | cpu32 },
-
-{"trapccl",	one(0052373),	one(0177777), "#l", m68020up | cpu32 },
-{"trapcsl",	one(0052773),	one(0177777), "#l", m68020up | cpu32 },
-{"trapeql",	one(0053773),	one(0177777), "#l", m68020up | cpu32 },
-{"trapfl",	one(0050773),	one(0177777), "#l", m68020up | cpu32 },
-{"trapgel",	one(0056373),	one(0177777), "#l", m68020up | cpu32 | mcf5200},
-{"trapgtl",	one(0057373),	one(0177777), "#l", m68020up | cpu32 },
-{"traphil",	one(0051373),	one(0177777), "#l", m68020up | cpu32 },
-{"traplel",	one(0057773),	one(0177777), "#l", m68020up | cpu32 },
-{"traplsl",	one(0051773),	one(0177777), "#l", m68020up | cpu32 },
-{"trapltl",	one(0056773),	one(0177777), "#l", m68020up | cpu32 },
-{"trapmil",	one(0055773),	one(0177777), "#l", m68020up | cpu32 },
-{"trapnel",	one(0053373),	one(0177777), "#l", m68020up | cpu32 },
-{"trappll",	one(0055373),	one(0177777), "#l", m68020up | cpu32 },
-{"traptl",	one(0050373),	one(0177777), "#l", m68020up | cpu32 },
-{"trapvcl",	one(0054373),	one(0177777), "#l", m68020up | cpu32 },
-{"trapvsl",	one(0054773),	one(0177777), "#l", m68020up | cpu32 },
+{"trapccw",	one(0052372),	one(0177777), "#w", m68020up|cpu32 },
+{"trapcsw",	one(0052772),	one(0177777), "#w", m68020up|cpu32 },
+{"trapeqw",	one(0053772),	one(0177777), "#w", m68020up|cpu32 },
+{"trapfw",	one(0050772),	one(0177777), "#w", m68020up|cpu32|mcf5200},
+{"trapgew",	one(0056372),	one(0177777), "#w", m68020up|cpu32 },
+{"trapgtw",	one(0057372),	one(0177777), "#w", m68020up|cpu32 },
+{"traphiw",	one(0051372),	one(0177777), "#w", m68020up|cpu32 },
+{"traplew",	one(0057772),	one(0177777), "#w", m68020up|cpu32 },
+{"traplsw",	one(0051772),	one(0177777), "#w", m68020up|cpu32 },
+{"trapltw",	one(0056772),	one(0177777), "#w", m68020up|cpu32 },
+{"trapmiw",	one(0055772),	one(0177777), "#w", m68020up|cpu32 },
+{"trapnew",	one(0053372),	one(0177777), "#w", m68020up|cpu32 },
+{"trapplw",	one(0055372),	one(0177777), "#w", m68020up|cpu32 },
+{"traptw",	one(0050372),	one(0177777), "#w", m68020up|cpu32 },
+{"trapvcw",	one(0054372),	one(0177777), "#w", m68020up|cpu32 },
+{"trapvsw",	one(0054772),	one(0177777), "#w", m68020up|cpu32 },
+
+{"trapccl",	one(0052373),	one(0177777), "#l", m68020up|cpu32 },
+{"trapcsl",	one(0052773),	one(0177777), "#l", m68020up|cpu32 },
+{"trapeql",	one(0053773),	one(0177777), "#l", m68020up|cpu32 },
+{"trapfl",	one(0050773),	one(0177777), "#l", m68020up|cpu32|mcf5200},
+{"trapgel",	one(0056373),	one(0177777), "#l", m68020up|cpu32 },
+{"trapgtl",	one(0057373),	one(0177777), "#l", m68020up|cpu32 },
+{"traphil",	one(0051373),	one(0177777), "#l", m68020up|cpu32 },
+{"traplel",	one(0057773),	one(0177777), "#l", m68020up|cpu32 },
+{"traplsl",	one(0051773),	one(0177777), "#l", m68020up|cpu32 },
+{"trapltl",	one(0056773),	one(0177777), "#l", m68020up|cpu32 },
+{"trapmil",	one(0055773),	one(0177777), "#l", m68020up|cpu32 },
+{"trapnel",	one(0053373),	one(0177777), "#l", m68020up|cpu32 },
+{"trappll",	one(0055373),	one(0177777), "#l", m68020up|cpu32 },
+{"traptl",	one(0050373),	one(0177777), "#l", m68020up|cpu32 },
+{"trapvcl",	one(0054373),	one(0177777), "#l", m68020up|cpu32 },
+{"trapvsl",	one(0054773),	one(0177777), "#l", m68020up|cpu32 },
 
 {"trapv",	one(0047166),	one(0177777), "", m68000up },
 
@@ -1748,8 +1748,8 @@ TBL("tblunb", "tblunw", "tblunl", 0, 0),
 {"unpk",	one(0100610),	one(0170770), "-s-d#w", m68020up },
 
 {"wddatab",	one(0172000),   one(0177700), "~s", mcf5200 },
-{"wddataw",	one(0172040),   one(0177700), "~s", mcf5200 },
-{"wddatal",	one(0172100),   one(0177700), "~s", mcf5200 },
+{"wddataw",	one(0172100),   one(0177700), "~s", mcf5200 },
+{"wddatal",	one(0172200),   one(0177700), "~s", mcf5200 },
 
 };