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authorAndreas Krebbel <krebbel@linux.vnet.ibm.com>2015-04-27 10:29:16 +0200
committerAndreas Krebbel <krebbel@linux.vnet.ibm.com>2015-04-27 10:29:16 +0200
commit3b78cfe1033fafa6ca36c69cf8587c1bd96996ca (patch)
tree619162201e321695faabb815288edf72aedb6915 /opcodes
parent963a4320b49a3c55af02b36a492a10ba04a08e8a (diff)
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S/390: Fixes for z13 instructions.
opcodes/ * s390-opc.c: New instruction type VV0UU2. * s390-opc.txt: Fix instruction types for VFCE, VLDE, VFSQ, WFK, and WFC. gas/testsuite/ * gas/s390/zarch-z13.d: Fix tests for VFCE, VLDE, VFSQ, WFK, and WFC. * gas/s390/zarch-z13.s: Likewise.
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog6
-rw-r--r--opcodes/s390-opc.c2
-rw-r--r--opcodes/s390-opc.txt10
3 files changed, 13 insertions, 5 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 26eb961..48886f6 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,9 @@
+2015-04-27 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
+
+ * s390-opc.c: New instruction type VV0UU2.
+ * s390-opc.txt: Fix instruction types for VFCE, VLDE, VFSQ, WFK,
+ and WFC.
+
2015-04-23 Jan Beulich <jbeulich@suse.com>
* i386-dis.c (putop): Extend "XY" handling to AVX512. Handle "XZ".
diff --git a/opcodes/s390-opc.c b/opcodes/s390-opc.c
index a803579..befd171 100644
--- a/opcodes/s390-opc.c
+++ b/opcodes/s390-opc.c
@@ -484,6 +484,7 @@ const struct s390_operand s390_operands[] =
#define INSTR_VRR_VV0U 6, { V_8,V_12,U4_32,0,0,0 } /* e.g. vseg */
#define INSTR_VRR_VV0U2 6, { V_8,V_12,U4_24,0,0,0 } /* e.g. vistrb*/
#define INSTR_VRR_VV0UU 6, { V_8,V_12,U4_28,U4_24,0,0 } /* e.g. vcdgb */
+#define INSTR_VRR_VV0UU2 6, { V_8,V_12,U4_32,U4_28,0,0 } /* e.g. wfc */
#define INSTR_VRR_VV0UU8 6, { V_8,V_12,U4_OR8_28,U4_24,0,0 } /* e.g. wcdgb */
#define INSTR_VRR_VV 6, { V_8,V_12,0,0,0,0 } /* e.g. vsegb */
#define INSTR_VRR_VVVUU0V 6, { V_8,V_12,V_16,V_32,U4_20,U4_24 } /* e.g. vstrc */
@@ -690,6 +691,7 @@ const struct s390_operand s390_operands[] =
#define MASK_VRR_VV0U { 0xff, 0x00, 0xff, 0xff, 0x00, 0xff }
#define MASK_VRR_VV0U2 { 0xff, 0x00, 0xff, 0x0f, 0xf0, 0xff }
#define MASK_VRR_VV0UU { 0xff, 0x00, 0xff, 0x00, 0xf0, 0xff }
+#define MASK_VRR_VV0UU2 { 0xff, 0x00, 0xff, 0xf0, 0x00, 0xff }
#define MASK_VRR_VV0UU8 { 0xff, 0x00, 0xff, 0x08, 0xf0, 0xff }
#define MASK_VRR_VV { 0xff, 0x00, 0xff, 0xff, 0xf0, 0xff }
#define MASK_VRR_VVVUU0V { 0xff, 0x00, 0x00, 0x0f, 0x00, 0xff }
diff --git a/opcodes/s390-opc.txt b/opcodes/s390-opc.txt
index 7900278..3f0a487 100644
--- a/opcodes/s390-opc.txt
+++ b/opcodes/s390-opc.txt
@@ -1586,11 +1586,11 @@ e7000230008a vstrczfs VRR_VVVU0VB3 "vector string range compare word" z13 zarch
e700000000e3 vfa VRR_VVV0UU "vector fp add" z13 zarch
e700000030e3 vfadb VRR_VVV "vector fp add" z13 zarch
e700000830e3 wfadb VRR_VVV "vector fp add" z13 zarch
-e700000000cb wfc VRR_VV0UU "vector fp compare scalar" z13 zarch
+e700000000cb wfc VRR_VV0UU2 "vector fp compare scalar" z13 zarch
e700000030cb wfcdb VRR_VV "vector fp compare scalar" z13 zarch
-e700000000ca wfk VRR_VV0UU "vector fp compare and signal scalar" z13 zarch
+e700000000ca wfk VRR_VV0UU2 "vector fp compare and signal scalar" z13 zarch
e700000030ca wfkdb VRR_VV "vector fp compare and signal scalar" z13 zarch
-e700000000e8 vfce VRR_VVV "vector fp compare equal" z13 zarch
+e700000000e8 vfce VRR_VVV0UUU "vector fp compare equal" z13 zarch
e700000030e8 vfcedb VRR_VVV "vector fp compare equal" z13 zarch
e700001030e8 vfcedbs VRR_VVV "vector fp compare equal" z13 zarch
e700000830e8 wfcedb VRR_VVV "vector fp compare equal" z13 zarch
@@ -1623,7 +1623,7 @@ e700000830e5 wfddb VRR_VVV "vector fp divide" z13 zarch
e700000000c7 vfi VRR_VV0UUU "vector load fp integer" z13 zarch
e700000030c7 vfidb VRR_VV0UU "vector load fp integer" z13 zarch
e700000830c7 wfidb VRR_VV0UU8 "vector load fp integer" z13 zarch
-e700000000c4 vlde VRR_VV0UU "vector fp load lengthened" z13 zarch
+e700000000c4 vlde VRR_VV0UU2 "vector fp load lengthened" z13 zarch
e700000020c4 vldeb VRR_VV "vector fp load lengthened" z13 zarch
e700000820c4 wldeb VRR_VV "vector fp load lengthened" z13 zarch
e700000000c5 vled VRR_VV0UUU "vector fp load rounded" z13 zarch
@@ -1647,7 +1647,7 @@ e700001030cc vflndb VRR_VV "vector fp perform sign operation" z13 zarch
e700001830cc wflndb VRR_VV "vector fp perform sign operation" z13 zarch
e700002030cc vflpdb VRR_VV "vector fp perform sign operation" z13 zarch
e700002830cc wflpdb VRR_VV "vector fp perform sign operation" z13 zarch
-e700000000ce vfsq VRR_VV0UU "vector fp square root" z13 zarch
+e700000000ce vfsq VRR_VV0UU2 "vector fp square root" z13 zarch
e700000030ce vfsqdb VRR_VV "vector fp square root" z13 zarch
e700000830ce wfsqdb VRR_VV "vector fp square root" z13 zarch
e700000000e2 vfs VRR_VVV0UU "vector fp subtract" z13 zarch