FT32 initial support

FT32 is a new 32-bit RISC core developed by FTDI for embedded applications.

	* configure.ac: Add FT32 support.
	* configure: Regenerate.
bfd/
	* Makefile.am: Add FT32 files.
	* archures.c (enum bfd_architecture): Add bfd_arch_ft32.
	(bfd_mach_ft32): Define.
	(bfd_ft32_arch): Declare.
	(bfd_archures_list): Add bfd_ft32_arch.
	* config.bfd: Handle FT32.
	* configure.ac: Likewise.
	* cpu-ft32.c: New file.
	* elf32-ft32.c: New file.
	* reloc.c (BFD_RELOC_FT32_10, BFD_RELOC_FT32_20, BFD_RELOC_FT32_17,
	BFD_RELOC_FT32_18): Define.
	* targets.c (_bfd_target_vector): Add ft32_elf32_vec.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* po/SRC-POTFILES.in: Regenerate.
binutils/
	* readelf.c: Add FT32 support.
gas/
	* Makefile.am: Add FT32 files.
	* config/tc-ft32.c: New file.
	* config/tc-ft32.h: New file.
	* configure.tgt: Add FT32 support.
	* Makefile.in: Regenerate.
	* po/POTFILES.in: Regenerate.
gas/testsuite/
	* gas/ft32/ft32.exp: New file.
	* gas/ft32/insn.d: New file.
	* gas/ft32/insn.s: New file.
include/
	* dis-asm.h (print_insn_ft32): Declare.
include/elf/
	* common.h (EM_FT32): Define.
	* ft32.h: New file.
include/opcode/
	* ft32.h: New file.
ld/
	* Makefile.am: Add FT32 files.
	* configure.tgt: Handle FT32 target.
	* emulparams/elf32ft32.sh: New file.
	* scripttempl/ft32.sc: New file.
	* Makefile.in: Regenerate.
opcodes/
	* Makefile.am: Add FT32 files.
	* configure.ac: Handle FT32.
	* disassemble.c (disassembler): Call print_insn_ft32.
	* ft32-dis.c: New file.
	* ft32-opc.c: New file.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* po/POTFILES.in: Regenerate.

9 files changed, 292 insertions, 0 deletions

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 7a3d49d..89fe9ce 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,14 @@
+2015-01-28  James Bowman  <james.bowman@ftdichip.com>
+
+	* Makefile.am: Add FT32 files.
+	* configure.ac: Handle FT32.
+	* disassemble.c (disassembler): Call print_insn_ft32.
+	* ft32-dis.c: New file.
+	* ft32-opc.c: New file.
+	* Makefile.in: Regenerate.
+	* configure: Regenerate.
+	* po/POTFILES.in: Regenerate.
+
 2015-01-28 Kuan-Lin Chen <kuanlinchentw@gmail.com>
 
 	* nds32-asm.c (keyword_sr): Add new system registers.
diff --git a/opcodes/Makefile.am b/opcodes/Makefile.am
index 320f8bb..4adc6ff 100644
--- a/opcodes/Makefile.am
+++ b/opcodes/Makefile.am
@@ -135,6 +135,8 @@ TARGET_LIBOPCODES_CFILES = \
 	frv-dis.c \
 	frv-ibld.c \
 	frv-opc.c \
+	ft32-dis.c \
+	ft32-opc.c \
 	h8300-dis.c \
 	h8500-dis.c \
 	hppa-dis.c \
diff --git a/opcodes/Makefile.in b/opcodes/Makefile.in
index 31876ca..d9ddefa 100644
--- a/opcodes/Makefile.in
+++ b/opcodes/Makefile.in
@@ -408,6 +408,8 @@ TARGET_LIBOPCODES_CFILES = \
 	frv-dis.c \
 	frv-ibld.c \
 	frv-opc.c \
+	ft32-dis.c \
+	ft32-opc.c \
 	h8300-dis.c \
 	h8500-dis.c \
 	hppa-dis.c \
@@ -810,6 +812,8 @@ distclean-compile:
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/frv-dis.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/frv-ibld.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/frv-opc.Plo@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ft32-dis.Plo@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ft32-opc.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/h8300-dis.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/h8500-dis.Plo@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/hppa-dis.Plo@am__quote@
diff --git a/opcodes/configure b/opcodes/configure
index c97bdf6..cd3aa83 100755
--- a/opcodes/configure
+++ b/opcodes/configure
@@ -12549,6 +12549,7 @@ if test x${all_targets} = xfalse ; then
 	bfd_dlx_arch)		ta="$ta dlx-dis.lo" ;;
 	bfd_fr30_arch)		ta="$ta fr30-asm.lo fr30-desc.lo fr30-dis.lo fr30-ibld.lo fr30-opc.lo" using_cgen=yes ;;
 	bfd_frv_arch)		ta="$ta frv-asm.lo frv-desc.lo frv-dis.lo frv-ibld.lo frv-opc.lo" using_cgen=yes ;;
+	bfd_ft32_arch)		ta="$ta ft32-opc.lo ft32-dis.lo" ;;
 	bfd_moxie_arch)		ta="$ta moxie-dis.lo moxie-opc.lo" ;;
 	bfd_h8300_arch)		ta="$ta h8300-dis.lo" ;;
 	bfd_h8500_arch)		ta="$ta h8500-dis.lo" ;;
diff --git a/opcodes/configure.ac b/opcodes/configure.ac
index 74bccff..eab16d6 100644
--- a/opcodes/configure.ac
+++ b/opcodes/configure.ac
@@ -266,6 +266,7 @@ if test x${all_targets} = xfalse ; then
 	bfd_dlx_arch)		ta="$ta dlx-dis.lo" ;;
 	bfd_fr30_arch)		ta="$ta fr30-asm.lo fr30-desc.lo fr30-dis.lo fr30-ibld.lo fr30-opc.lo" using_cgen=yes ;;
 	bfd_frv_arch)		ta="$ta frv-asm.lo frv-desc.lo frv-dis.lo frv-ibld.lo frv-opc.lo" using_cgen=yes ;;
+	bfd_ft32_arch)		ta="$ta ft32-opc.lo ft32-dis.lo" ;;
 	bfd_moxie_arch)		ta="$ta moxie-dis.lo moxie-opc.lo" ;;
 	bfd_h8300_arch)		ta="$ta h8300-dis.lo" ;;
 	bfd_h8500_arch)		ta="$ta h8500-dis.lo" ;;
diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c
index 0c1d7e0..f47a190 100644
--- a/opcodes/disassemble.c
+++ b/opcodes/disassemble.c
@@ -37,6 +37,7 @@
 #define ARCH_epiphany
 #define ARCH_fr30
 #define ARCH_frv
+#define ARCH_ft32
 #define ARCH_h8300
 #define ARCH_h8500
 #define ARCH_hppa
@@ -445,6 +446,11 @@ disassembler (abfd)
       disassemble = print_insn_tic80;
       break;
 #endif
+#ifdef ARCH_ft32
+    case bfd_arch_ft32:
+      disassemble = print_insn_ft32;
+      break;
+#endif
 #ifdef ARCH_v850
     case bfd_arch_v850:
     case bfd_arch_v850_rh850:
diff --git a/opcodes/ft32-dis.c b/opcodes/ft32-dis.c
new file mode 100644
index 0000000..877a7ee
--- /dev/null
+++ b/opcodes/ft32-dis.c
@@ -0,0 +1,177 @@
+/* Disassemble ft32 instructions.
+   Copyright (C) 2013-2015 Free Software Foundation, Inc.
+   Contributed by FTDI (support@ftdichip.com)
+
+   This file is part of the GNU opcodes library.
+
+   This library is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   It is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+   MA 02110-1301, USA.  */
+
+#include "sysdep.h"
+#include <stdio.h>
+#define STATIC_TABLE
+#define DEFINE_TABLE
+
+#include "opcode/ft32.h"
+#include "dis-asm.h"
+
+extern const ft32_opc_info_t ft32_opc_info[128];
+
+static fprintf_ftype fpr;
+static void *stream;
+
+int
+print_insn_ft32 (bfd_vma addr, struct disassemble_info *info)
+{
+  int status;
+  stream = info->stream;
+  bfd_byte buffer[4];
+  unsigned int iword;
+  const ft32_opc_info_t *oo;
+
+  fpr = info->fprintf_func;
+
+  if ((status = info->read_memory_func (addr, buffer, 4, info)))
+    goto fail;
+
+  iword = bfd_getl32 (buffer);
+
+  for (oo = ft32_opc_info; oo->name; oo++)
+    if ((iword & oo->mask) == oo->bits)
+      break;
+
+  if (oo->name)
+    {
+      int f = oo->fields;
+      int imm;
+
+      fpr (stream, "%08x %s", iword, oo->name);
+      if (oo->dw)
+        {
+          fpr (stream, ".%c ", "bsl"[(iword >> FT32_FLD_DW_BIT) & 3]);
+        }
+      else
+        {
+          fpr (stream, " ");
+        }
+
+      while (f)
+        {
+          int lobit = f & -f;
+          if (f & lobit)
+            {
+              switch (lobit)
+              {
+              case  FT32_FLD_CBCRCV:
+                // imm is {CB, CV}
+                imm = ((iword >> FT32_FLD_CB_BIT) & ((1 << FT32_FLD_CB_SIZ) - 1)) << 4;
+                imm |= ((iword >> FT32_FLD_CV_BIT) & ((1 << FT32_FLD_CV_SIZ) - 1));
+                switch (imm)
+                {
+                case 0x00: fpr(stream, "nz");  break;
+                case 0x01: fpr(stream, "z");   break;
+                case 0x10: fpr(stream, "ae");  break;
+                case 0x11: fpr(stream, "b");   break;
+                case 0x20: fpr(stream, "no");  break;
+                case 0x21: fpr(stream, "o");   break;
+                case 0x30: fpr(stream, "ns");  break;
+                case 0x31: fpr(stream, "s");   break;
+                case 0x40: fpr(stream, "lt");  break;
+                case 0x41: fpr(stream, "gte"); break;
+                case 0x50: fpr(stream, "lte"); break;
+                case 0x51: fpr(stream, "gt");  break;
+                case 0x60: fpr(stream, "be");  break;
+                case 0x61: fpr(stream, "a");   break;
+                default:   fpr(stream, "%d,$r30,%d", (imm >> 4), (imm & 1)); break;
+                }
+                break;
+              case  FT32_FLD_CB:
+                imm = (iword >> FT32_FLD_CB_BIT) & ((1 << FT32_FLD_CB_SIZ) - 1);
+                fpr(stream, "%d", imm);
+                break;
+              case  FT32_FLD_R_D:
+                fpr(stream, "$r%d", (iword >> FT32_FLD_R_D_BIT) & 0x1f);
+                break;
+              case  FT32_FLD_CR:
+                imm = (iword >> FT32_FLD_CR_BIT) & ((1 << FT32_FLD_CR_SIZ) - 1);
+                fpr(stream, "$r%d", 28 + imm);
+                break;
+              case  FT32_FLD_CV:
+                imm = (iword >> FT32_FLD_CV_BIT) & ((1 << FT32_FLD_CV_SIZ) - 1);
+                fpr(stream, "%d", imm);
+                break;
+              case  FT32_FLD_R_1:
+                fpr(stream, "$r%d", (iword >> FT32_FLD_R_1_BIT) & 0x1f);
+                break;
+              case  FT32_FLD_RIMM:
+                imm = (iword >> FT32_FLD_RIMM_BIT) & ((1 << FT32_FLD_RIMM_SIZ) - 1);
+                if (imm & 0x400)
+                  info->print_address_func ((bfd_vma) imm & 0x1ff, info);
+                else
+                  fpr(stream, "$r%d", imm & 0x1f);
+                break;
+              case  FT32_FLD_R_2:
+                fpr(stream, "$r%d", (iword >> FT32_FLD_R_2_BIT) & 0x1f);
+                break;
+              case  FT32_FLD_K20:
+                imm = iword & ((1 << FT32_FLD_K20_SIZ) - 1);
+                info->print_address_func ((bfd_vma) imm, info);
+                break;
+              case  FT32_FLD_PA:
+                imm = (iword & ((1 << FT32_FLD_PA_SIZ) - 1)) << 2;
+                info->print_address_func ((bfd_vma) imm, info);
+                break;
+              case  FT32_FLD_AA:
+                imm = iword & ((1 << FT32_FLD_AA_SIZ) - 1);
+                info->print_address_func ((bfd_vma) imm, info);
+                break;
+                break;
+              case  FT32_FLD_K16:
+                imm = iword & ((1 << FT32_FLD_K16_SIZ) - 1);
+                info->print_address_func ((bfd_vma) imm, info);
+                break;
+              case  FT32_FLD_K8:
+                imm = iword & ((1 << FT32_FLD_K8_SIZ) - 1);
+                info->print_address_func ((bfd_vma) imm, info);
+                break;
+                break;
+              case  FT32_FLD_R_D_POST:
+                fpr(stream, "$r%d", (iword >> FT32_FLD_R_D_BIT) & 0x1f);
+                break;
+              case  FT32_FLD_R_1_POST:
+                fpr(stream, "$r%d", (iword >> FT32_FLD_R_1_BIT) & 0x1f);
+                break;
+              default:
+                break;
+              }
+              f &= ~lobit;
+              if (f)
+                {
+                  fpr(stream, ",");
+                }
+            }
+        }
+    }
+    else
+    {
+      fpr (stream, "%08x!", iword);
+    }
+
+  return 4;
+
+ fail:
+  info->memory_error_func (status, addr, info);
+  return -1;
+}
diff --git a/opcodes/ft32-opc.c b/opcodes/ft32-opc.c
new file mode 100644
index 0000000..04cda41
--- /dev/null
+++ b/opcodes/ft32-opc.c
@@ -0,0 +1,88 @@
+/* ft32-opc.c -- Definitions for ft32 opcodes.
+   Copyright (C) 2013-2015 Free Software Foundation, Inc.
+   Contributed by FTDI (support@ftdichip.com)
+
+   This file is part of the GNU opcodes library.
+
+   This library is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   It is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this file; see the file COPYING.  If not, write to the
+   Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
+   MA 02110-1301, USA.  */
+
+#include "sysdep.h"
+#include "opcode/ft32.h"
+
+const ft32_opc_info_t ft32_opc_info[] =
+{
+{       "nop", 0, 0xffffffffU, 0x40004000U, 0},
+{      "move", 1, 0xf8007fffU, 0x40004000U, FT32_FLD_R_D|FT32_FLD_R_1},
+{  "streamin", 1, 0xf800000fU, 0xf000000cU, FT32_FLD_R_D|FT32_FLD_R_1|FT32_FLD_RIMM},
+{       "ldi", 1, 0xf8000000U, 0xa8000000U, FT32_FLD_R_D|FT32_FLD_R_1|FT32_FLD_K8},
+{       "exi", 1, 0xf8000000U, 0xe8000000U, FT32_FLD_R_D|FT32_FLD_R_1|FT32_FLD_K8},
+{    "return", 0, 0xfc000000U, 0xa0000000U, 0},
+{        "or", 1, 0xf800000fU, 0x40000005U, FT32_FLD_R_D|FT32_FLD_R_1|FT32_FLD_RIMM},
+{       "pop", 1, 0xf8000000U, 0x88000000U, FT32_FLD_R_D},
+{       "sta", 1, 0xf8000000U, 0xb8000000U, FT32_FLD_AA|FT32_FLD_R_D_POST},
+{       "xor", 1, 0xf800000fU, 0x40000006U, FT32_FLD_R_D|FT32_FLD_R_1|FT32_FLD_RIMM},
+{    "memcpy", 1, 0xf800000fU, 0xf0000005U, FT32_FLD_R_D|FT32_FLD_R_1|FT32_FLD_RIMM},
+{    "strlen", 1, 0xf8007fffU, 0xf0004006U, FT32_FLD_R_D|FT32_FLD_R_1},
+{       "cmp", 1, 0xf9f0000fU, 0x59e00002U, FT32_FLD_R_1|FT32_FLD_RIMM},
+{      "btst", 1, 0xf9f0000fU, 0x59e0000cU, FT32_FLD_R_1|FT32_FLD_RIMM},
+{      "link", 0, 0xfe000000U, 0x94000000U, FT32_FLD_R_D|FT32_FLD_K16},
+{      "call", 0, 0xfffc0000U, 0x00340000U, FT32_FLD_PA},
+{     "callc", 0, 0xf8340000U, 0x00240000U, FT32_FLD_CBCRCV|FT32_FLD_PA},
+{     "callx", 0, 0xf8040000U, 0x00040000U, FT32_FLD_CR|FT32_FLD_CB|FT32_FLD_CV|FT32_FLD_PA},
+{ "streamini", 1, 0xf800000fU, 0xf000000dU, FT32_FLD_R_D|FT32_FLD_R_1|FT32_FLD_RIMM},
+{       "lda", 1, 0xf8000000U, 0xc0000000U, FT32_FLD_R_D|FT32_FLD_AA},
+{       "exa", 1, 0xf8000000U, 0x38000000U, FT32_FLD_R_D|FT32_FLD_AA},
+{    "unlink", 0, 0xf8000000U, 0x98000000U, FT32_FLD_R_D},
+{     "calli", 0, 0xfffc0000U, 0x08340000U, FT32_FLD_R_2},
+{    "stpcpy", 1, 0xf8007fffU, 0xf000400aU, FT32_FLD_R_D|FT32_FLD_R_1},
+{       "jmp", 0, 0xfffc0000U, 0x00300000U, FT32_FLD_PA},
+{    "strcmp", 1, 0xf800000fU, 0xf0000004U, FT32_FLD_R_D|FT32_FLD_R_1|FT32_FLD_RIMM},
+{       "mul", 1, 0xf800000fU, 0xf0000008U, FT32_FLD_R_D|FT32_FLD_R_1|FT32_FLD_RIMM},
+{      "push", 1, 0xf8000000U, 0x80000000U, FT32_FLD_R_1},
+{       "sti", 1, 0xf8000000U, 0xb0000000U, FT32_FLD_R_D|FT32_FLD_K8|FT32_FLD_R_1_POST},
+{       "mod", 1, 0xf800000fU, 0xf0000003U, FT32_FLD_R_D|FT32_FLD_R_1|FT32_FLD_RIMM},
+{      "umod", 1, 0xf800000fU, 0xf0000001U, FT32_FLD_R_D|FT32_FLD_R_1|FT32_FLD_RIMM},
+{     "addcc", 1, 0xf9f0000fU, 0x59e00000U, FT32_FLD_R_1|FT32_FLD_RIMM},
+{ "streamout", 1, 0xf800000fU, 0xf000000eU, FT32_FLD_R_D|FT32_FLD_R_1|FT32_FLD_RIMM},
+{      "lpmi", 1, 0xf8000000U, 0xc8000000U, FT32_FLD_R_D|FT32_FLD_R_1|FT32_FLD_K8},
+{      "udiv", 1, 0xf800000fU, 0xf0000000U, FT32_FLD_R_D|FT32_FLD_R_1|FT32_FLD_RIMM},
+{       "sub", 1, 0xf800000fU, 0x40000002U, FT32_FLD_R_D|FT32_FLD_R_1|FT32_FLD_RIMM},
+{      "lshr", 1, 0xf800000fU, 0x40000009U, FT32_FLD_R_D|FT32_FLD_R_1|FT32_FLD_RIMM},
+{       "tst", 1, 0xf9f0000fU, 0x59e00004U, FT32_FLD_R_1|FT32_FLD_RIMM},
+{      "xnor", 1, 0xf800000fU, 0x40000007U, FT32_FLD_R_D|FT32_FLD_R_1|FT32_FLD_RIMM},
+{     "muluh", 1, 0xf800000fU, 0xf0000009U, FT32_FLD_R_D|FT32_FLD_R_1|FT32_FLD_RIMM},
+{       "and", 1, 0xf800000fU, 0x40000004U, FT32_FLD_R_D|FT32_FLD_R_1|FT32_FLD_RIMM},
+{       "add", 1, 0xf800000fU, 0x40000000U, FT32_FLD_R_D|FT32_FLD_R_1|FT32_FLD_RIMM},
+{       "ror", 1, 0xf800000fU, 0x40000001U, FT32_FLD_R_D|FT32_FLD_R_1|FT32_FLD_RIMM},
+{       "ldl", 1, 0xf800000fU, 0x40000003U, FT32_FLD_R_D|FT32_FLD_R_1|FT32_FLD_RIMM},
+{      "bins", 1, 0xf800000fU, 0x4000000bU, FT32_FLD_R_D|FT32_FLD_R_1|FT32_FLD_RIMM},
+{     "bexts", 1, 0xf800000fU, 0x4000000cU, FT32_FLD_R_D|FT32_FLD_R_1|FT32_FLD_RIMM},
+{     "bextu", 1, 0xf800000fU, 0x4000000dU, FT32_FLD_R_D|FT32_FLD_R_1|FT32_FLD_RIMM},
+{      "flip", 1, 0xf800000fU, 0x4000000eU, FT32_FLD_R_D|FT32_FLD_R_1|FT32_FLD_RIMM},
+{    "memset", 1, 0xf800000fU, 0xf0000007U, FT32_FLD_R_D|FT32_FLD_R_1|FT32_FLD_RIMM},
+{       "div", 1, 0xf800000fU, 0xf0000002U, FT32_FLD_R_D|FT32_FLD_R_1|FT32_FLD_RIMM},
+{       "ldk", 1, 0xf8000000U, 0x60000000U, FT32_FLD_R_D|FT32_FLD_K20},
+{      "reti", 0, 0xfc000000U, 0xa4000000U, 0},
+{      "ashr", 1, 0xf800000fU, 0x4000000aU, FT32_FLD_R_D|FT32_FLD_R_1|FT32_FLD_RIMM},
+{      "jmpi", 0, 0xfffc0000U, 0x08300000U, FT32_FLD_R_2},
+{     "jmpic", 0, 0xf8040000U, 0x08000000U, FT32_FLD_CBCRCV|FT32_FLD_R_2},
+{      "ashl", 1, 0xf800000fU, 0x40000008U, FT32_FLD_R_D|FT32_FLD_R_1|FT32_FLD_RIMM},
+{      "jmpc", 0, 0xf8340000U, 0x00200000U, FT32_FLD_CBCRCV|FT32_FLD_PA},
+{      "jmpx", 0, 0xf8040000U, 0x00000000U, FT32_FLD_CR|FT32_FLD_CB|FT32_FLD_CV|FT32_FLD_PA},
+{       "lpm", 1, 0xf8000000U, 0x68000000U, FT32_FLD_R_D|FT32_FLD_PA},
+{"streamouti", 1, 0xf800000fU, 0xf000000fU, FT32_FLD_R_D|FT32_FLD_R_1|FT32_FLD_RIMM},
+{ NULL, 0, 0, 0, 0}
+};
diff --git a/opcodes/po/POTFILES.in b/opcodes/po/POTFILES.in
index 8e8e122..0e8039d 100644
--- a/opcodes/po/POTFILES.in
+++ b/opcodes/po/POTFILES.in
@@ -56,6 +56,8 @@ frv-dis.c
 frv-ibld.c
 frv-opc.c
 frv-opc.h
+ft32-dis.c
+ft32-opc.c
 h8300-dis.c
 h8500-dis.c
 h8500-opc.h