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authorNick Clifton <nickc@redhat.com>2005-07-07 11:37:10 +0000
committerNick Clifton <nickc@redhat.com>2005-07-07 11:37:10 +0000
commit22f8fcbd5c1a5d6df62cf41845a95980d5f94abf (patch)
tree195736e26142c94af4aee38aa814f5f8e04457a4 /opcodes
parent5f1285334e371992682078f9fb83d79d56d1858f (diff)
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arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction disassembly
pattern. vfp1xD.d: Adjust expected fadds disassemblies now that the dissassembler has been fixed.
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog5
-rw-r--r--opcodes/arm-dis.c2
2 files changed, 6 insertions, 1 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index af7b4f9..3fa5367 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2005-07-07 Khem Raj <kraj@mvista.com>
+
+ * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
+ disassembly pattern.
+
2005-07-06 Alan Modra <amodra@bigpond.net.au>
* Makefile.am (stamp-m32r): Fix path to cpu files.
diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c
index d136af1..faff3a0 100644
--- a/opcodes/arm-dis.c
+++ b/opcodes/arm-dis.c
@@ -460,7 +460,7 @@ static const struct opcode32 arm_opcodes[] =
{FPU_VFP_EXT_V1, 0x0eb00bc0, 0x0fff0ff0, "fabsd%c\t%1z, %0z"},
{FPU_VFP_EXT_V1xD, 0x0eb00ac0, 0x0fbf0fd0, "fabss%c\t%1y, %0y"},
{FPU_VFP_EXT_V1, 0x0e300b00, 0x0ff00ff0, "faddd%c\t%1z, %2z, %0z"},
- {FPU_VFP_EXT_V1xD, 0x0e300a00, 0x0fb00f50, "fadds%c\t%1y, %2y, %1y"},
+ {FPU_VFP_EXT_V1xD, 0x0e300a00, 0x0fb00f50, "fadds%c\t%1y, %2y, %0y"},
{FPU_VFP_EXT_V1, 0x0eb40b40, 0x0fff0f70, "fcmp%7'ed%c\t%1z, %0z"},
{FPU_VFP_EXT_V1xD, 0x0eb40a40, 0x0fbf0f50, "fcmp%7'es%c\t%1y, %0y"},
{FPU_VFP_EXT_V1, 0x0eb50b40, 0x0fff0f70, "fcmp%7'ezd%c\t%1z"},