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| author | Paul Brook <paul@codesourcery.com> | 2006-11-29 16:26:56 +0000 |
|---|---|---|
| committer | Paul Brook <paul@codesourcery.com> | 2006-11-29 16:26:56 +0000 |
| commit | 00249aaae7d7cb22e216966cea456be188810cdf (patch) | |
| tree | 05d0b537ad72ee49faa760794d570cd0b74b4287 /opcodes | |
| parent | ac6c2fba055f3e5617d63b00c29279c876e4e0f9 (diff) | |
| download | gdb-00249aaae7d7cb22e216966cea456be188810cdf.zip gdb-00249aaae7d7cb22e216966cea456be188810cdf.tar.gz gdb-00249aaae7d7cb22e216966cea456be188810cdf.tar.bz2 | |
2006-11-29 Paul Brook <paul@codesourcery.com>
gas/
* config/tc-arm.c (do_vfp_sp_const, do_vfp_dp_const): Fix operans
encoding.
gas/testsuite/
* gas/arm/vfpv3-const-conv.s: Improve test coverage.
* gas/arm/vfpv3-const-conv.d: Adjust expected output.
* gas/arm/vfp-neon-syntax_t2.d: Ditto.
* gas/arm/vfp-neon-syntax.d: Ditto.
opcodes/
* arm-dis.c (coprocessor_opcodes): Fix bitfields for fconstd/fconstd.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 4 | ||||
| -rw-r--r-- | opcodes/arm-dis.c | 4 |
2 files changed, 6 insertions, 2 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 00b0aaf..f9a755a 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,7 @@ +2006-11-29 Paul Brook <paul@codesourcery.com> + + * arm-dis.c (coprocessor_opcodes): Fix bitfields for fconstd/fconstd. + 2006-11-22 Daniel Jacobowitz <dan@codesourcery.com> * arm-dis.c (last_is_thumb): Delete. diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index c5342fa..49765d8 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -308,8 +308,8 @@ static const struct opcode32 coprocessor_opcodes[] = {FPU_VFP_EXT_V3, 0x0ebe0a40, 0x0fbe0f50, "fto%16?us%7?lhs%c\t%y1, #%5,0-3k"}, {FPU_VFP_EXT_V3, 0x0ebe0b40, 0x0fbe0f50, "fto%16?us%7?lhd%c\t%z1, #%5,0-3k"}, {FPU_VFP_EXT_V1, 0x0c500b10, 0x0fb00ff0, "fmrrd%c\t%12-15r, %16-19r, %z0"}, - {FPU_VFP_EXT_V3, 0x0eb00a00, 0x0fb00ff0, "fconsts%c\t%y1, #%16-19,0-3d"}, - {FPU_VFP_EXT_V3, 0x0eb00b00, 0x0fb00ff0, "fconstd%c\t%z1, #%16-19,0-3d"}, + {FPU_VFP_EXT_V3, 0x0eb00a00, 0x0fb00ff0, "fconsts%c\t%y1, #%0-3,16-19d"}, + {FPU_VFP_EXT_V3, 0x0eb00b00, 0x0fb00ff0, "fconstd%c\t%z1, #%0-3,16-19d"}, {FPU_VFP_EXT_V2, 0x0c400a10, 0x0ff00fd0, "fmsrr%c\t%y4, %12-15r, %16-19r"}, {FPU_VFP_EXT_V2, 0x0c400b10, 0x0ff00fd0, "fmdrr%c\t%z0, %12-15r, %16-19r"}, {FPU_VFP_EXT_V2, 0x0c500a10, 0x0ff00fd0, "fmrrs%c\t%12-15r, %16-19r, %y4"}, |