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authorRichard Sandiford <rdsandiford@googlemail.com>2013-08-01 22:33:24 +0000
committerRichard Sandiford <rdsandiford@googlemail.com>2013-08-01 22:33:24 +0000
commitdf34fbcce872115ccb78a8a7652e3c413b63677d (patch)
tree814f342374add2aafe2e1b8b7f67661d638e5359 /opcodes
parentfc76e730568e8dfd035147a8d5c608205574a61c (diff)
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opcodes/
* micromips-opc.c (WR_s): Delete.
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog4
-rw-r--r--opcodes/micromips-opc.c1
2 files changed, 4 insertions, 1 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index c0f92db..0d67105 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,5 +1,9 @@
2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
+ * micromips-opc.c (WR_s): Delete.
+
+2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
+
* mips-opc.c (WR_1, WR_2, RD_1, RD_2, RD_3, RD_4, MOD_1, MOD_2, UDI):
New macros.
(WR_d, WR_t, WR_D, WR_T, WR_S, RD_s, RD_b, RD_t, RD_S, RD_T, RD_R)
diff --git a/opcodes/micromips-opc.c b/opcodes/micromips-opc.c
index df0b0dd..5243d4c 100644
--- a/opcodes/micromips-opc.c
+++ b/opcodes/micromips-opc.c
@@ -196,7 +196,6 @@ decode_micromips_operand (const char *p)
#define RD_pc INSN2_READ_PC
/* For 32-bit microMIPS instructions. */
-#define WR_s INSN_WRITE_GPR_S
#define WR_31 INSN_WRITE_GPR_31
#define WR_CC INSN_WRITE_COND_CODE