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author | Jan Beulich <jbeulich@novell.com> | 2017-11-23 11:04:18 +0100 |
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committer | Jan Beulich <jbeulich@suse.com> | 2017-11-23 11:04:18 +0100 |
commit | 65f3ed048fa0741e874c7aa372f9ddba153a2949 (patch) | |
tree | 1ebbe1a6a298a49a6b68bd2a1d602095a44c6005 /opcodes | |
parent | 43083a502b8d658b8d096111e54afcc73b0215a4 (diff) | |
download | gdb-65f3ed048fa0741e874c7aa372f9ddba153a2949.zip gdb-65f3ed048fa0741e874c7aa372f9ddba153a2949.tar.gz gdb-65f3ed048fa0741e874c7aa372f9ddba153a2949.tar.bz2 |
x86: fix AVX-512 16-bit addressing
Despite EVEX encodings not being available in real and VM86 modes,
16-bit addressing still needs to be handled properly for 16-bit
protected mode as well as 16-bit addressing in 32-bit mode. Neither
should displacements be dropped silently by the assembler, nor should
the disassembler fail to correctly scale 8-bit displacements.
Diffstat (limited to 'opcodes')
-rw-r--r-- | opcodes/ChangeLog | 5 | ||||
-rw-r--r-- | opcodes/i386-dis.c | 2 |
2 files changed, 7 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 5762466..c1a1e5e 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,10 @@ 2017-11-23 Jan Beulich <jbeulich@suse.com> + * i386-dis.c (OP_E_memory): Also shift the 8-bit immediate in + the 16-bit addressing case. + +2017-11-23 Jan Beulich <jbeulich@suse.com> + * i386-dis.c (dis386_twobyte): Correct ud1. Add ud0. (twobyte_has_modrm): Set flag for index 0xb9 and 0xff. * i386-opc.tbl (ud1, ud2b): Add operands. diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 12b723a..6b8d1dc 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -15481,6 +15481,8 @@ OP_E_memory (int bytemode, int sizeflag) disp = *codep++; if ((disp & 0x80) != 0) disp -= 0x100; + if (vex.evex && shift > 0) + disp <<= shift; break; case 2: disp = get16 (); |