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| author | Andreas Arnez <arnez@linux.vnet.ibm.com> | 2013-10-30 18:04:32 +0100 |
|---|---|---|
| committer | Andreas Krebbel <krebbel@linux.vnet.ibm.com> | 2013-10-30 18:04:32 +0100 |
| commit | 7d4a7d107ab506c1cecc1870112be57390410248 (patch) | |
| tree | b1854d1d7db6464fe8ca1c739fd20fbf816daffa /opcodes | |
| parent | b4f7960d5307fe4aad2126382df78f63696e96b3 (diff) | |
| download | gdb-7d4a7d107ab506c1cecc1870112be57390410248.zip gdb-7d4a7d107ab506c1cecc1870112be57390410248.tar.gz gdb-7d4a7d107ab506c1cecc1870112be57390410248.tar.bz2 | |
S/390: Disassemble 31-bit binaries with "zarch" opcode set by default
Currently the disassembler for s390 (by default) assumes that a 31-bit
binary was compiled in "ESA" mode -- and then only disassembles a
limited opcode set. The change upgrades the default to the full "zarch"
opcode set even for 31-bit binaries.
opcodes/
* s390-dis.c (init_disasm): Default to full 'zarch' opcode
availability even for 31-bit programs.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 5 | ||||
| -rw-r--r-- | opcodes/s390-dis.c | 12 |
2 files changed, 6 insertions, 11 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index bc42de4..c96df92 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2013-10-30 Andreas Arnez <arnez@linux.vnet.ibm.com> + + * s390-dis.c (init_disasm): Default to full 'zarch' opcode + availability even for 31-bit programs. + 2013-10-15 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> * arm-dis.c (neon_opcodes): Adjust print string for vshll. diff --git a/opcodes/s390-dis.c b/opcodes/s390-dis.c index ef73d85..c5397d6 100644 --- a/opcodes/s390-dis.c +++ b/opcodes/s390-dis.c @@ -65,17 +65,7 @@ init_disasm (struct disassemble_info *info) } if (!current_arch_mask) - switch (info->mach) - { - case bfd_mach_s390_31: - current_arch_mask = 1 << S390_OPCODE_ESA; - break; - case bfd_mach_s390_64: - current_arch_mask = 1 << S390_OPCODE_ZARCH; - break; - default: - abort (); - } + current_arch_mask = 1 << S390_OPCODE_ZARCH; init_flag = 1; } |