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author | Richard Sandiford <rdsandiford@googlemail.com> | 2013-08-19 18:57:00 +0000 |
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committer | Richard Sandiford <rdsandiford@googlemail.com> | 2013-08-19 18:57:00 +0000 |
commit | 0f35dbc4d98da6b1e251ac8148a9d20d6276012b (patch) | |
tree | 6e4202d87d72f88053a4d5e51f72bac84de20836 /opcodes | |
parent | 33b60d58316e0ce994c009e1a9bede277538b69e (diff) | |
download | gdb-0f35dbc4d98da6b1e251ac8148a9d20d6276012b.zip gdb-0f35dbc4d98da6b1e251ac8148a9d20d6276012b.tar.gz gdb-0f35dbc4d98da6b1e251ac8148a9d20d6276012b.tar.bz2 |
include/opcode/
* mips.h (OP_OPTIONAL_REG): New mips_operand_type.
(mips_optional_operand_p): New function.
opcodes/
* mips-formats.h (OPTIONAL_REG, OPTIONAL_MAPPED_REG): New macros.
* micromips-opc.c (decode_micromips_operand): Use OPTIONAL_REG
and OPTIONAL_MAPPED_REG.
* mips-opc.c (decode_mips_operand): Likewise.
* mips16-opc.c (decode_mips16_operand): Likewise.
* mips-dis.c (print_insn_arg): Handle OP_OPTIONAL_REG.
gas/
* config/tc-mips.c (operand_reg_mask, match_operand): Handle
OP_OPTIONAL_REG.
(mips_ip, mips16_ip): Use mips_optional_operand_p to check
for optional operands.
Diffstat (limited to 'opcodes')
-rw-r--r-- | opcodes/ChangeLog | 9 | ||||
-rw-r--r-- | opcodes/micromips-opc.c | 12 | ||||
-rw-r--r-- | opcodes/mips-dis.c | 1 | ||||
-rw-r--r-- | opcodes/mips-formats.h | 18 | ||||
-rw-r--r-- | opcodes/mips-opc.c | 10 | ||||
-rw-r--r-- | opcodes/mips16-opc.c | 4 |
6 files changed, 41 insertions, 13 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 58cd107..b4840ee 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,12 @@ +2013-08-19 Richard Sandiford <rdsandiford@googlemail.com> + + * mips-formats.h (OPTIONAL_REG, OPTIONAL_MAPPED_REG): New macros. + * micromips-opc.c (decode_micromips_operand): Use OPTIONAL_REG + and OPTIONAL_MAPPED_REG. + * mips-opc.c (decode_mips_operand): Likewise. + * mips16-opc.c (decode_mips16_operand): Likewise. + * mips-dis.c (print_insn_arg): Handle OP_OPTIONAL_REG. + 2013-08-19 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (PREFIX_EVEX_0F3A3E): Removed. diff --git a/opcodes/micromips-opc.c b/opcodes/micromips-opc.c index 5243d4c..33dd57e 100644 --- a/opcodes/micromips-opc.c +++ b/opcodes/micromips-opc.c @@ -53,9 +53,9 @@ decode_micromips_operand (const char *p) { case 'a': MAPPED_REG (0, 0, GP, reg_28_map); case 'b': MAPPED_REG (3, 23, GP, reg_m16_map); - case 'c': MAPPED_REG (3, 4, GP, reg_m16_map); + case 'c': OPTIONAL_MAPPED_REG (3, 4, GP, reg_m16_map); case 'd': MAPPED_REG (3, 7, GP, reg_m16_map); - case 'e': MAPPED_REG (3, 1, GP, reg_m16_map); + case 'e': OPTIONAL_MAPPED_REG (3, 1, GP, reg_m16_map); case 'f': MAPPED_REG (3, 3, GP, reg_m16_map); case 'g': MAPPED_REG (3, 0, GP, reg_m16_map); case 'h': REG_PAIR (3, 7, GP, reg_h_map); @@ -144,7 +144,7 @@ decode_micromips_operand (const char *p) case 'R': REG (5, 6, FP); case 'S': REG (5, 16, FP); case 'T': REG (5, 21, FP); - case 'V': REG (5, 16, FP); + case 'V': OPTIONAL_REG (5, 16, FP); case 'a': JUMP (26, 0, 1); case 'b': REG (5, 16, GP); @@ -158,12 +158,12 @@ decode_micromips_operand (const char *p) case 'o': SINT (16, 0); case 'p': BRANCH (16, 0, 1); case 'q': HINT (10, 6); - case 'r': REG (5, 16, GP); + case 'r': OPTIONAL_REG (5, 16, GP); case 's': REG (5, 16, GP); case 't': REG (5, 21, GP); case 'u': HINT (16, 0); - case 'v': REG (5, 16, GP); - case 'w': REG (5, 21, GP); + case 'v': OPTIONAL_REG (5, 16, GP); + case 'w': OPTIONAL_REG (5, 21, GP); case 'y': REG (5, 6, GP); case 'z': MAPPED_REG (0, 0, GP, reg_0_map); } diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c index 1d1c724..dce4d86 100644 --- a/opcodes/mips-dis.c +++ b/opcodes/mips-dis.c @@ -1042,6 +1042,7 @@ print_insn_arg (struct disassemble_info *info, break; case OP_REG: + case OP_OPTIONAL_REG: { const struct mips_reg_operand *reg_op; diff --git a/opcodes/mips-formats.h b/opcodes/mips-formats.h index 49a0623..4b5aaaf 100644 --- a/opcodes/mips-formats.h +++ b/opcodes/mips-formats.h @@ -69,6 +69,14 @@ return &op.root; \ } +#define OPTIONAL_REG(SIZE, LSB, BANK) \ + { \ + static const struct mips_reg_operand op = { \ + { OP_OPTIONAL_REG, SIZE, LSB }, OP_REG_##BANK, 0 \ + }; \ + return &op.root; \ + } + #define MAPPED_REG(SIZE, LSB, BANK, MAP) \ { \ typedef char ATTRIBUTE_UNUSED \ @@ -79,6 +87,16 @@ return &op.root; \ } +#define OPTIONAL_MAPPED_REG(SIZE, LSB, BANK, MAP) \ + { \ + typedef char ATTRIBUTE_UNUSED \ + static_assert[(1 << (SIZE)) == ARRAY_SIZE (MAP)]; \ + static const struct mips_reg_operand op = { \ + { OP_OPTIONAL_REG, SIZE, LSB }, OP_REG_##BANK, MAP \ + }; \ + return &op.root; \ + } + #define REG_PAIR(SIZE, LSB, BANK, MAP) \ { \ typedef char ATTRIBUTE_UNUSED \ diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c index feb96a5..7fdc938 100644 --- a/opcodes/mips-opc.c +++ b/opcodes/mips-opc.c @@ -134,8 +134,8 @@ decode_mips_operand (const char *p) case 'S': REG (5, 11, FP); case 'T': REG (5, 16, FP); case 'U': SPECIAL (10, 11, CLO_CLZ_DEST); - case 'V': REG (5, 11, FP); - case 'W': REG (5, 16, FP); + case 'V': OPTIONAL_REG (5, 11, FP); + case 'W': OPTIONAL_REG (5, 16, FP); case 'X': REG (5, 6, VEC); case 'Y': REG (5, 11, VEC); case 'Z': REG (5, 16, VEC); @@ -153,12 +153,12 @@ decode_mips_operand (const char *p) case 'o': SINT (16, 0); case 'p': BRANCH (16, 0, 2); case 'q': HINT (10, 6); - case 'r': REG (5, 21, GP); + case 'r': OPTIONAL_REG (5, 21, GP); case 's': REG (5, 21, GP); case 't': REG (5, 16, GP); case 'u': HINT (16, 0); - case 'v': REG (5, 21, GP); - case 'w': REG (5, 16, GP); + case 'v': OPTIONAL_REG (5, 21, GP); + case 'w': OPTIONAL_REG (5, 16, GP); case 'x': REG (0, 0, GP); case 'z': MAPPED_REG (0, 0, GP, reg_0_map); } diff --git a/opcodes/mips16-opc.c b/opcodes/mips16-opc.c index 9948741..598f823 100644 --- a/opcodes/mips16-opc.c +++ b/opcodes/mips16-opc.c @@ -66,8 +66,8 @@ decode_mips16_operand (char type, bfd_boolean extended_p) case 'i': JALX (26, 0, 2); case 'l': SPECIAL (6, 5, ENTRY_EXIT_LIST); case 'm': SPECIAL (7, 0, SAVE_RESTORE_LIST); - case 'v': MAPPED_REG (3, 8, GP, reg_m16_map); - case 'w': MAPPED_REG (3, 5, GP, reg_m16_map); + case 'v': OPTIONAL_MAPPED_REG (3, 8, GP, reg_m16_map); + case 'w': OPTIONAL_MAPPED_REG (3, 5, GP, reg_m16_map); case 'x': MAPPED_REG (3, 8, GP, reg_m16_map); case 'y': MAPPED_REG (3, 5, GP, reg_m16_map); case 'z': MAPPED_REG (3, 2, GP, reg_m16_map); |