diff options
author | Nick Clifton <nickc@redhat.com> | 2001-09-19 17:40:28 +0000 |
---|---|---|
committer | Nick Clifton <nickc@redhat.com> | 2001-09-19 17:40:28 +0000 |
commit | d5b2f4d67cf654227d255e7e72c5f85fe2f020ee (patch) | |
tree | 5436d1ebdf67f851d5975ae38520168ac79e8771 /opcodes | |
parent | 38131e6744be32896c1259d5db95a1f492c11533 (diff) | |
download | gdb-d5b2f4d67cf654227d255e7e72c5f85fe2f020ee.zip gdb-d5b2f4d67cf654227d255e7e72c5f85fe2f020ee.tar.gz gdb-d5b2f4d67cf654227d255e7e72c5f85fe2f020ee.tar.bz2 |
Fix compile time warning messages
Diffstat (limited to 'opcodes')
-rw-r--r-- | opcodes/ChangeLog | 12 | ||||
-rw-r--r-- | opcodes/arm-dis.c | 2 | ||||
-rw-r--r-- | opcodes/cgen-asm.c | 4 | ||||
-rw-r--r-- | opcodes/cgen-dis.c | 4 | ||||
-rw-r--r-- | opcodes/cris-dis.c | 2 | ||||
-rw-r--r-- | opcodes/d10v-dis.c | 4 | ||||
-rw-r--r-- | opcodes/fr30-asm.c | 20 | ||||
-rw-r--r-- | opcodes/fr30-desc.c | 8 | ||||
-rw-r--r-- | opcodes/fr30-dis.c | 77 | ||||
-rw-r--r-- | opcodes/fr30-ibld.c | 43 |
10 files changed, 117 insertions, 59 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 17cc563..1dad511 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,15 @@ +2001-09-19 Nick Clifton <nickc@cambridge.redhat.com> + + * arm-dis.c: Fix compile time warning messages. + * cgen-asm.c: Fix compile time warning messages. + * cgen-dis.c: Fix compile time warning messages. + * cris-dis.c: Fix compile time warning messages. + * d10v-dis.c: Fix compile time warning messages. + * fr30-asm.c: Fix compile time warning messages. + * fr30-desc.c: Fix compile time warning messages. + * fr30-dis.c: Fix compile time warning messages. + * fr30-ibld.c: Fix compile time warning messages. + 2001-09-18 Bruno Haible <haible@clisp.cons.org> * cgen-asm.c: Include "safe-ctype.h" instead of <ctype.h>. diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index a36dd1a..61038ae 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -1105,7 +1105,7 @@ the -M switch:\n")); for (i = NUM_ARM_REGNAMES; i--;) fprintf (stream, " reg-names-%s %*c%s\n", regnames[i].name, - 14 - strlen (regnames[i].name), ' ', + (int)(14 - strlen (regnames[i].name)), ' ', regnames[i].description); fprintf (stream, " force-thumb Assume all insns are Thumb insns\n"); diff --git a/opcodes/cgen-asm.c b/opcodes/cgen-asm.c index dba0c37..b664d7b 100644 --- a/opcodes/cgen-asm.c +++ b/opcodes/cgen-asm.c @@ -28,6 +28,10 @@ #include "opcode/cgen.h" #include "opintl.h" +static CGEN_INSN_LIST * hash_insn_array PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *, int, int, CGEN_INSN_LIST **, CGEN_INSN_LIST *)); +static CGEN_INSN_LIST * hash_insn_list PARAMS ((CGEN_CPU_DESC, const CGEN_INSN_LIST *, CGEN_INSN_LIST **, CGEN_INSN_LIST *)); +static void build_asm_hash_table PARAMS ((CGEN_CPU_DESC)); + /* Set the cgen_parse_operand_fn callback. */ void diff --git a/opcodes/cgen-dis.c b/opcodes/cgen-dis.c index b4297bb4..8e9fe56 100644 --- a/opcodes/cgen-dis.c +++ b/opcodes/cgen-dis.c @@ -27,6 +27,10 @@ #include "symcat.h" #include "opcode/cgen.h" +static CGEN_INSN_LIST * hash_insn_array PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *, int, int, CGEN_INSN_LIST **, CGEN_INSN_LIST *)); +static CGEN_INSN_LIST * hash_insn_list PARAMS ((CGEN_CPU_DESC, const CGEN_INSN_LIST *, CGEN_INSN_LIST **, CGEN_INSN_LIST *)); +static void build_dis_hash_table PARAMS ((CGEN_CPU_DESC)); + /* Subroutine of build_dis_hash_table to add INSNS to the hash table. COUNT is the number of elements in INSNS. diff --git a/opcodes/cris-dis.c b/opcodes/cris-dis.c index dcd9911..33806ee 100644 --- a/opcodes/cris-dis.c +++ b/opcodes/cris-dis.c @@ -1197,7 +1197,7 @@ print_insn_cris_generic (memaddr, info, with_reg_prefix) bytes; stacked prefixes will not be expanded. */ unsigned char buffer[MAX_BYTES_PER_CRIS_INSN]; unsigned char *bufp; - int status; + int status = 0; bfd_vma addr; /* There will be an "out of range" error after the last instruction. diff --git a/opcodes/d10v-dis.c b/opcodes/d10v-dis.c index 29996ad..d337a6b 100644 --- a/opcodes/d10v-dis.c +++ b/opcodes/d10v-dis.c @@ -202,7 +202,7 @@ dis_long (insn, memaddr, info) while (op->name) { - if ((op->format & LONG_OPCODE) && ((op->mask & insn) == op->opcode)) + if ((op->format & LONG_OPCODE) && ((op->mask & insn) == (unsigned long) op->opcode)) { match = 1; (*info->fprintf_func) (info->stream, "%s\t", op->name); @@ -253,7 +253,7 @@ dis_2_short (insn, memaddr, info, order) while (op->name) { if ((op->format & SHORT_OPCODE) - && ((op->mask & ins[j]) == op->opcode)) + && ((op->mask & ins[j]) == (unsigned long) op->opcode)) { (*info->fprintf_func) (info->stream, "%s\t", op->name); for (i = 0; op->operands[i]; i++) diff --git a/opcodes/fr30-asm.c b/opcodes/fr30-asm.c index df9d216..eae0620 100644 --- a/opcodes/fr30-asm.c +++ b/opcodes/fr30-asm.c @@ -35,14 +35,21 @@ along with this program; if not, write to the Free Software Foundation, Inc., #include "fr30-opc.h" #include "opintl.h" #include "xregex.h" +#include "libiberty.h" #undef min #define min(a,b) ((a) < (b) ? (a) : (b)) #undef max #define max(a,b) ((a) > (b) ? (a) : (b)) -static const char * parse_insn_normal - PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *)); +static const char * parse_insn_normal PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *)); +static int parse_register_number PARAMS ((const char **)); +static const char * parse_register_list PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *, int, int)); +static const char * parse_low_register_list_ld PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); +static const char * parse_hi_register_list_ld PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); +static const char * parse_low_register_list_st PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); +static const char * parse_hi_register_list_st PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); + const char * fr30_cgen_parse_operand PARAMS ((CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *)); /* -- assembler routines inserted here */ @@ -70,9 +77,9 @@ parse_register_number (strp) static const char * parse_register_list (cd, strp, opindex, valuep, high_low, load_store) - CGEN_CPU_DESC cd; + CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; const char **strp; - int opindex; + int opindex ATTRIBUTE_UNUSED; unsigned long *valuep; int high_low; /* 0 == high, 1 == low */ int load_store; /* 0 == load, 1 == store */ @@ -168,8 +175,7 @@ parse_hi_register_list_st (cd, strp, opindex, valuep) This function could be moved into `parse_insn_normal', but keeping it separate makes clear the interface between `parse_insn_normal' and each of - the handlers. -*/ + the handlers. */ const char * fr30_cgen_parse_operand (cd, opindex, strp, fields) @@ -344,7 +350,7 @@ char * fr30_cgen_build_insn_regex (insn) CGEN_INSN *insn; { - CGEN_OPCODE *opc = CGEN_INSN_OPCODE (insn); + CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); const char *mnem = CGEN_INSN_MNEMONIC (insn); int mnem_len; char rxbuf[CGEN_MAX_RX_ELEMENTS]; diff --git a/opcodes/fr30-desc.c b/opcodes/fr30-desc.c index 0eb6755..9fc4379 100644 --- a/opcodes/fr30-desc.c +++ b/opcodes/fr30-desc.c @@ -33,6 +33,14 @@ with this program; if not, write to the Free Software Foundation, Inc., #include "opintl.h" #include "libiberty.h" +static void init_tables PARAMS ((void)); +static const CGEN_MACH * lookup_mach_via_bfd_name PARAMS ((const CGEN_MACH *, const char *)); +static void build_hw_table PARAMS ((CGEN_CPU_TABLE *)); +static void build_ifield_table PARAMS ((CGEN_CPU_TABLE *)); +static void build_operand_table PARAMS ((CGEN_CPU_TABLE *)); +static void build_insn_table PARAMS ((CGEN_CPU_TABLE *)); +static void fr30_cgen_rebuild_tables PARAMS ((CGEN_CPU_TABLE *)); + /* Attributes. */ static const CGEN_ATTR_ENTRY bool_attr[] = diff --git a/opcodes/fr30-dis.c b/opcodes/fr30-dis.c index 0e4aceb..f9adba5 100644 --- a/opcodes/fr30-dis.c +++ b/opcodes/fr30-dis.c @@ -38,19 +38,20 @@ along with this program; if not, write to the Free Software Foundation, Inc., /* Default text to print if an instruction isn't recognized. */ #define UNKNOWN_INSN_MSG _("*unknown*") -static void print_normal - PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned int, bfd_vma, int)); -static void print_address - PARAMS ((CGEN_CPU_DESC, PTR, bfd_vma, unsigned int, bfd_vma, int)); -static void print_keyword - PARAMS ((CGEN_CPU_DESC, PTR, CGEN_KEYWORD *, long, unsigned int)); -static void print_insn_normal - PARAMS ((CGEN_CPU_DESC, PTR, const CGEN_INSN *, CGEN_FIELDS *, - bfd_vma, int)); -static int print_insn PARAMS ((CGEN_CPU_DESC, bfd_vma, - disassemble_info *, char *, int)); -static int default_print_insn - PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *)); +static void print_normal PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int)); +static void print_address PARAMS ((CGEN_CPU_DESC, PTR, bfd_vma, unsigned, bfd_vma, int)); +static void print_keyword PARAMS ((CGEN_CPU_DESC, PTR, CGEN_KEYWORD *, long, unsigned)); +static void print_insn_normal PARAMS ((CGEN_CPU_DESC, PTR, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int)); +static int print_insn PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, int)); +static int default_print_insn PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *)); +static void print_register_list PARAMS ((PTR, long, long, int)); +static void print_hi_register_list_ld PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int)); +static void print_low_register_list_ld PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int)); +static void print_hi_register_list_st PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int)); +static void print_low_register_list_st PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int)); +static void print_m4 PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int)); + void fr30_cgen_print_operand PARAMS ((CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int)); +static int read_insn PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, int, CGEN_EXTRACT_INFO *, unsigned long *)); /* -- disassembler routines inserted here */ @@ -96,60 +97,60 @@ print_register_list (dis_info, value, offset, load_store) static void print_hi_register_list_ld (cd, dis_info, value, attrs, pc, length) - CGEN_CPU_DESC cd; + CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; PTR dis_info; long value; - unsigned int attrs; - bfd_vma pc; - int length; + unsigned int attrs ATTRIBUTE_UNUSED; + bfd_vma pc ATTRIBUTE_UNUSED; + int length ATTRIBUTE_UNUSED; { print_register_list (dis_info, value, 8, 0/*load*/); } static void print_low_register_list_ld (cd, dis_info, value, attrs, pc, length) - CGEN_CPU_DESC cd; + CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; PTR dis_info; long value; - unsigned int attrs; - bfd_vma pc; - int length; + unsigned int attrs ATTRIBUTE_UNUSED; + bfd_vma pc ATTRIBUTE_UNUSED; + int length ATTRIBUTE_UNUSED; { print_register_list (dis_info, value, 0, 0/*load*/); } static void print_hi_register_list_st (cd, dis_info, value, attrs, pc, length) - CGEN_CPU_DESC cd; + CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; PTR dis_info; long value; - unsigned int attrs; - bfd_vma pc; - int length; + unsigned int attrs ATTRIBUTE_UNUSED; + bfd_vma pc ATTRIBUTE_UNUSED; + int length ATTRIBUTE_UNUSED; { print_register_list (dis_info, value, 8, 1/*store*/); } static void print_low_register_list_st (cd, dis_info, value, attrs, pc, length) - CGEN_CPU_DESC cd; + CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; PTR dis_info; long value; - unsigned int attrs; - bfd_vma pc; - int length; + unsigned int attrs ATTRIBUTE_UNUSED; + bfd_vma pc ATTRIBUTE_UNUSED; + int length ATTRIBUTE_UNUSED; { print_register_list (dis_info, value, 0, 1/*store*/); } static void print_m4 (cd, dis_info, value, attrs, pc, length) - CGEN_CPU_DESC cd; + CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; PTR dis_info; long value; - unsigned int attrs; - bfd_vma pc; - int length; + unsigned int attrs ATTRIBUTE_UNUSED; + bfd_vma pc ATTRIBUTE_UNUSED; + int length ATTRIBUTE_UNUSED; { disassemble_info *info = (disassemble_info *) dis_info; (*info->fprintf_func) (info->stream, "%ld", value); @@ -178,7 +179,7 @@ fr30_cgen_print_operand (cd, opindex, xinfo, fields, attrs, pc, length) int opindex; PTR xinfo; CGEN_FIELDS *fields; - void const *attrs; + void const *attrs ATTRIBUTE_UNUSED; bfd_vma pc; int length; { @@ -458,7 +459,7 @@ print_insn_normal (cd, dis_info, insn, fields, pc, length) Returns 0 if all is well, non-zero otherwise. */ static int read_insn (cd, pc, info, buf, buflen, ex_info, insn_value) - CGEN_CPU_DESC cd; + CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; bfd_vma pc; disassemble_info *info; char *buf; @@ -537,7 +538,7 @@ print_insn (cd, pc, info, buf, buflen) /* Base size may exceed this instruction's size. Extract the relevant part from the buffer. */ if ((CGEN_INSN_BITSIZE (insn) / 8) < buflen && - (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) + (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn), info->endian == BFD_ENDIAN_BIG); else @@ -552,8 +553,8 @@ print_insn (cd, pc, info, buf, buflen) /* Make sure the entire insn is loaded into insn_value, if it can fit. */ - if (CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize && - (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) + if ((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize && + (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) { unsigned long full_insn_value; int rc = read_insn (cd, pc, info, buf, diff --git a/opcodes/fr30-ibld.c b/opcodes/fr30-ibld.c index 95fc5d0..7c07886 100644 --- a/opcodes/fr30-ibld.c +++ b/opcodes/fr30-ibld.c @@ -48,7 +48,6 @@ static const char * insert_normal static const char * insert_insn_normal PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma)); - static int extract_normal PARAMS ((CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, unsigned int, unsigned int, unsigned int, unsigned int, @@ -56,8 +55,30 @@ static int extract_normal static int extract_insn_normal PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma)); +#if CGEN_INT_INSN_P static void put_insn_int_value PARAMS ((CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT)); +#endif +static CGEN_INLINE int fill_cache + PARAMS ((CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma)); +static CGEN_INLINE long extract_1 + PARAMS ((CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, + bfd_vma)); +static CGEN_INLINE void insert_1 + PARAMS ((CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *)); +const char * fr30_cgen_insert_operand + PARAMS ((CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma)); +int fr30_cgen_extract_operand + PARAMS ((CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, + bfd_vma)); +int fr30_cgen_get_int_operand + PARAMS ((CGEN_CPU_DESC, int, const CGEN_FIELDS *)); +bfd_vma fr30_cgen_get_vma_operand + PARAMS ((CGEN_CPU_DESC, int, const CGEN_FIELDS *)); +void fr30_cgen_set_int_operand + PARAMS ((CGEN_CPU_DESC, int, CGEN_FIELDS *, int)); +void fr30_cgen_set_vma_operand + PARAMS ((CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma)); /* Operand insertion. */ @@ -248,7 +269,7 @@ insert_insn_normal (cd, insn, fields, buffer, pc) #else cgen_put_insn_value (cd, buffer, min (cd->base_insn_bitsize, - CGEN_FIELDS_BITSIZE (fields)), + (unsigned) CGEN_FIELDS_BITSIZE (fields)), value); #endif /* ! CGEN_INT_INSN_P */ @@ -274,6 +295,7 @@ insert_insn_normal (cd, insn, fields, buffer, pc) return NULL; } +#if CGEN_INT_INSN_P /* Cover function to store an insn value into an integral insn. Must go here because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */ @@ -297,6 +319,7 @@ put_insn_int_value (cd, buf, length, insn_length, value) *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift); } } +#endif /* Operand extraction. */ @@ -310,14 +333,14 @@ put_insn_int_value (cd, buf, length, insn_length, value) static CGEN_INLINE int fill_cache (cd, ex_info, offset, bytes, pc) - CGEN_CPU_DESC cd; + CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; CGEN_EXTRACT_INFO *ex_info; int offset, bytes; bfd_vma pc; { /* It's doubtful that the middle part has already been fetched so we don't optimize that case. kiss. */ - int mask; + unsigned int mask; disassemble_info *info = (disassemble_info *) ex_info->dis_info; /* First do a quick check. */ @@ -355,10 +378,10 @@ fill_cache (cd, ex_info, offset, bytes, pc) static CGEN_INLINE long extract_1 (cd, ex_info, start, length, word_length, bufp, pc) CGEN_CPU_DESC cd; - CGEN_EXTRACT_INFO *ex_info; + CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED; int start,length,word_length; unsigned char *bufp; - bfd_vma pc; + bfd_vma pc ATTRIBUTE_UNUSED; { unsigned long x; int shift; @@ -942,7 +965,7 @@ cgen_extract_fn * const fr30_cgen_extract_handlers[] = int fr30_cgen_get_int_operand (cd, opindex, fields) - CGEN_CPU_DESC cd; + CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; int opindex; const CGEN_FIELDS * fields; { @@ -1071,7 +1094,7 @@ fr30_cgen_get_int_operand (cd, opindex, fields) bfd_vma fr30_cgen_get_vma_operand (cd, opindex, fields) - CGEN_CPU_DESC cd; + CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; int opindex; const CGEN_FIELDS * fields; { @@ -1205,7 +1228,7 @@ fr30_cgen_get_vma_operand (cd, opindex, fields) void fr30_cgen_set_int_operand (cd, opindex, fields, value) - CGEN_CPU_DESC cd; + CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; int opindex; CGEN_FIELDS * fields; int value; @@ -1327,7 +1350,7 @@ fr30_cgen_set_int_operand (cd, opindex, fields, value) void fr30_cgen_set_vma_operand (cd, opindex, fields, value) - CGEN_CPU_DESC cd; + CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; int opindex; CGEN_FIELDS * fields; bfd_vma value; |