MIPS: Remove remnants of 48-bit microMIPS instruction support

The POOL48A major opcode was defined in early revisions of the 64-bit
microMIPS ISA, has never been implemented, and was removed before the
64-bit microMIPS ISA specification[1] has been finalized.

This complements commit a6c7053929dd ("MIPS/opcodes: Remove microMIPS
48-bit LI instruction").

References:

[1] "MIPS Architecture for Programmers, Volume II-B: The microMIPS64
    Instruction Set", MIPS Technologies, Inc., Document Number: MD00594,
    Revision 3.06, October 17, 2012, Table 6.2 "microMIPS64 Encoding of
    Major Opcode Field", p. 578

	gas/
	* config/tc-mips.c (micromips_insn_length): Remove the mention
	of 48-bit microMIPS instructions.

	gdb/
	* mips-tdep.c (mips_insn_size): Remove 48-bit microMIPS
	instruction support.
	(micromips_next_pc): Likewise.
	(micromips_scan_prologue): Likewise.
	(micromips_deal_with_atomic_sequence): Likewise.
	(micromips_stack_frame_destroyed_p): Likewise.
	(mips_breakpoint_from_pc): Likewise.

	opcodes/
	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
	instruction support.

2 files changed, 6 insertions, 35 deletions

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 3260c89..8a6ea15 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2016-01-18  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
+	instruction support.
+
 2016-01-17  Alan Modra  <amodra@gmail.com>
 
 	* configure: Regenerate.
diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c
index 470f2ad..e152876 100644
--- a/opcodes/mips-dis.c
+++ b/opcodes/mips-dis.c
@@ -2185,41 +2185,7 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info)
   else
     insn = bfd_getl16 (buffer);
 
-  if ((insn & 0xfc00) == 0x7c00)
-    {
-      /* This is a 48-bit microMIPS instruction.  */
-      higher = insn;
-
-      status = (*info->read_memory_func) (memaddr + 2, buffer, 2, info);
-      if (status != 0)
-	{
-	  infprintf (is, "micromips 0x%x", higher);
-	  (*info->memory_error_func) (status, memaddr + 2, info);
-	  return -1;
-	}
-      if (info->endian == BFD_ENDIAN_BIG)
-	insn = bfd_getb16 (buffer);
-      else
-	insn = bfd_getl16 (buffer);
-      higher = (higher << 16) | insn;
-
-      status = (*info->read_memory_func) (memaddr + 4, buffer, 2, info);
-      if (status != 0)
-	{
-	  infprintf (is, "micromips 0x%x", higher);
-	  (*info->memory_error_func) (status, memaddr + 4, info);
-	  return -1;
-	}
-      if (info->endian == BFD_ENDIAN_BIG)
-	insn = bfd_getb16 (buffer);
-      else
-	insn = bfd_getl16 (buffer);
-      infprintf (is, "0x%x%04x (48-bit insn)", higher, insn);
-
-      info->insn_type = dis_noninsn;
-      return 6;
-    }
-  else if ((insn & 0x1c00) == 0x0000 || (insn & 0x1000) == 0x1000)
+  if ((insn & 0x1c00) == 0x0000 || (insn & 0x1000) == 0x1000)
     {
       /* This is a 32-bit microMIPS instruction.  */
       higher = insn;