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| author | Yufeng Zhang <yufeng.zhang@arm.com> | 2014-03-26 18:44:27 +0000 |
|---|---|---|
| committer | Yufeng Zhang <yufeng.zhang@arm.com> | 2014-03-26 18:44:27 +0000 |
| commit | 76dfed02aaee5074dc79c28c0224fd0a2bf0dd30 (patch) | |
| tree | 130ca02f35601db767c07ad482492d5491bb7e32 /opcodes | |
| parent | b3fe4307a625457c6953fce27bbbfc4c90e38e9d (diff) | |
| download | gdb-76dfed02aaee5074dc79c28c0224fd0a2bf0dd30.zip gdb-76dfed02aaee5074dc79c28c0224fd0a2bf0dd30.tar.gz gdb-76dfed02aaee5074dc79c28c0224fd0a2bf0dd30.tar.bz2 | |
[AArch64 disassembler] Add missing checks of undefine encodings on
st1/st2/st3/st4 instructions.
opcodes/
* aarch64-dis.c (aarch64_ext_ldst_elemlist): Check H/S undefined
instructions.
binutils/testsuite/
* binutils-all/aarch64/aarch64.exp: New test driver for AArch64.
* binutils-all/aarch64/unallocated-encoding.s: New testcase.
* binutils-all/aarch64/unallocated-encoding.d: Ditto.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 5 | ||||
| -rw-r--r-- | opcodes/aarch64-dis.c | 12 |
2 files changed, 14 insertions, 3 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 632491d..89de66f 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2014-03-26 Jiong Wang <jiong.wang@arm.com> + + * aarch64-dis.c (aarch64_ext_ldst_elemlist): Check H/S undefined + instructions. + 2014-03-20 Ilya Tocar <ilya.tocar@intel.com> * i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps, diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c index 477edb6..c3670fe 100644 --- a/opcodes/aarch64-dis.c +++ b/opcodes/aarch64-dis.c @@ -422,11 +422,17 @@ aarch64_ext_ldst_elemlist (const aarch64_operand *self ATTRIBUTE_UNUSED, info->reglist.index = QSsize; break; case 0x1: + if (QSsize & 0x1) + /* UND. */ + return 0; info->qualifier = AARCH64_OPND_QLF_S_H; /* Index encoded in "Q:S:size<1>". */ info->reglist.index = QSsize >> 1; break; case 0x2: + if ((QSsize >> 1) & 0x1) + /* UND. */ + return 0; if ((QSsize & 0x1) == 0) { info->qualifier = AARCH64_OPND_QLF_S_S; @@ -435,12 +441,12 @@ aarch64_ext_ldst_elemlist (const aarch64_operand *self ATTRIBUTE_UNUSED, } else { - info->qualifier = AARCH64_OPND_QLF_S_D; - /* Index encoded in "Q". */ - info->reglist.index = QSsize >> 3; if (extract_field (FLD_S, code, 0)) /* UND */ return 0; + info->qualifier = AARCH64_OPND_QLF_S_D; + /* Index encoded in "Q". */ + info->reglist.index = QSsize >> 3; } break; default: |