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| author | Nick Clifton <nickc@redhat.com> | 2013-09-04 07:59:33 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2013-09-04 07:59:33 +0000 |
| commit | 74db7efbe3a09c00e5f4f5b99862f173258938f6 (patch) | |
| tree | 78ae8bdacb48352b9a19f2d67b13d7c9340f366c /opcodes | |
| parent | 41dc8db876c8ee46687555fbff68b497b48d5ee4 (diff) | |
| download | gdb-74db7efbe3a09c00e5f4f5b99862f173258938f6.zip gdb-74db7efbe3a09c00e5f4f5b99862f173258938f6.tar.gz gdb-74db7efbe3a09c00e5f4f5b99862f173258938f6.tar.bz2 | |
PR gas/15914
* config/tc-arm.c (T16_32_TAB): Add _udf.
(do_t_udf): New function.
(insns): Add "udf".
* gas/arm/udf-bad.s: New file.
* gas/arm/udf-bad.d: New file.
* gas/arm/udf-bad.l: New file.
* gas/arm/udf.s: New file.
* gas/arm/udf.d: New file.
* gas/arm/udf.l: New file.
* arm-dis.c (arm_opcodes): Add udf.
(thumb_opcodes): Use "udf" mnemonic rather than UNDEFINED_INSTRUCTION.
(thumb32_opcodes): Add udf.w.
(print_insn_thumb32): Handle %H as the thumb32_opcodes comment says.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 8 | ||||
| -rw-r--r-- | opcodes/arm-dis.c | 19 |
2 files changed, 24 insertions, 3 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 200c5f0..04648a2 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,11 @@ +2013-09-04 Roland McGrath <mcgrathr@google.com> + + PR gas/15914 + * arm-dis.c (arm_opcodes): Add udf. + (thumb_opcodes): Use "udf" mnemonic rather than UNDEFINED_INSTRUCTION. + (thumb32_opcodes): Add udf.w. + (print_insn_thumb32): Handle %H as the thumb32_opcodes comment says. + 2013-09-02 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * s390-opc.txt: Fix description for fiebra, fidbra, and fixbra. diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index 0b1ed1a..18a553b 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -1,7 +1,5 @@ /* Instruction printing code for the ARM - Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, - 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2012 - Free Software Foundation, Inc. + Copyright 1994-2013 Free Software Foundation, Inc. Contributed by Richard Earnshaw (rwe@pegasus.esprit.ec.org) Modification by James G. Smith (jsmith@cygnus.co.uk) @@ -879,6 +877,8 @@ static const struct opcode32 arm_opcodes[] = { /* ARM instructions. */ {ARM_EXT_V1, 0xe1a00000, 0xffffffff, "nop\t\t\t; (mov r0, r0)"}, + {ARM_EXT_V1, 0xe7f000f0, 0xfff000f0, "udf\t#%e"}, + {ARM_EXT_V4T | ARM_EXT_V5, 0x012FFF10, 0x0ffffff0, "bx%c\t%0-3r"}, {ARM_EXT_V2, 0x00000090, 0x0fe000f0, "mul%20's%c\t%16-19R, %0-3R, %8-11R"}, {ARM_EXT_V2, 0x00200090, 0x0fe000f0, "mla%20's%c\t%16-19R, %0-3R, %8-11R, %12-15R"}, @@ -1414,6 +1414,7 @@ static const struct opcode16 thumb_opcodes[] = /* format 17 */ {ARM_EXT_V4T, 0xDF00, 0xFF00, "svc%c\t%0-7d"}, /* format 16 */ + {ARM_EXT_V4T, 0xDE00, 0xFF00, "udf%c\t#%0-7d"}, {ARM_EXT_V4T, 0xDE00, 0xFE00, UNDEFINED_INSTRUCTION}, {ARM_EXT_V4T, 0xD000, 0xF000, "b%8-11c.n\t%0-7B%X"}, /* format 18 */ @@ -1534,6 +1535,7 @@ static const struct opcode32 thumb32_opcodes[] = {ARM_EXT_V6T2, 0xf3af8003, 0xffffffff, "wfi%c.w"}, {ARM_EXT_V6T2, 0xf3af8004, 0xffffffff, "sev%c.w"}, {ARM_EXT_V6T2, 0xf3af8000, 0xffffff00, "nop%c.w\t{%0-7d}"}, + {ARM_EXT_V6T2, 0xf7f0a000, 0xfff0f000, "udf%c.w\t%H"}, {ARM_EXT_V6T2, 0xf3bf8f2f, 0xffffffff, "clrex%c"}, {ARM_EXT_V6T2, 0xf3af8400, 0xffffff1f, "cpsie.w\t%7'a%6'i%5'f%X"}, @@ -4057,6 +4059,17 @@ print_insn_thumb32 (bfd_vma pc, struct disassemble_info *info, long given) } break; + case 'H': + { + unsigned int imm = 0; + + imm |= (given & 0x000f0000u) >> 4; + imm |= (given & 0x00000fffu) >> 0; + func (stream, "#%u", imm); + value_in_comment = imm; + } + break; + case 'V': { unsigned int imm = 0; |