diff options
| author | Jeff Law <law@redhat.com> | 1998-06-24 19:02:27 +0000 |
|---|---|---|
| committer | Jeff Law <law@redhat.com> | 1998-06-24 19:02:27 +0000 |
| commit | 59557be25d5f74044eab82bb2480086ebae0f43d (patch) | |
| tree | 78fee035c750f1415ea4e058fdda0447f74d3f78 /opcodes | |
| parent | 0bbdd534d2d8a5d0d5115b3e7e0edc9e0dc4fe81 (diff) | |
| download | gdb-59557be25d5f74044eab82bb2480086ebae0f43d.zip gdb-59557be25d5f74044eab82bb2480086ebae0f43d.tar.gz gdb-59557be25d5f74044eab82bb2480086ebae0f43d.tar.bz2 | |
* mn10300-opc.c (mn10300_opcodes): Fix typo in IMM24 versions of the
am33 shift instructions.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 3 | ||||
| -rw-r--r-- | opcodes/m10300-opc.c | 6 |
2 files changed, 6 insertions, 3 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 290c099..66af5c2 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,6 +1,9 @@ start-sanitize-am33 Wed Jun 24 09:53:06 1998 Jeffrey A Law (law@cygnus.com) + * mn10300-opc.c (mn10300_opcodes): Fix typo in IMM24 versions of the + am33 shift instructions. + * mn10300-dis.c (print_insn_mn10300): 0xf9 opcode prefix specifies 3 byte instructions. (disassemble): Handle new instruction formats FMT_D6, FMT_D7, FMT_D8 diff --git a/opcodes/m10300-opc.c b/opcodes/m10300-opc.c index 19d98e4..99970d4 100644 --- a/opcodes/m10300-opc.c +++ b/opcodes/m10300-opc.c @@ -906,7 +906,7 @@ const struct mn10300_opcode mn10300_opcodes[] = { /* start-sanitize-am33 */ { "asr", 0xf94900, 0xffff00, FMT_D6, {RM2, RN0}}, { "asr", 0xfb490000, 0xffff0000, FMT_D7, {IMM8, RN02}}, -{ "asr", 0xfd490000, 0xfffc0000, FMT_D8, {IMM24, RN02}}, +{ "asr", 0xfd490000, 0xffff0000, FMT_D8, {IMM24, RN02}}, { "asr", 0xfe490000, 0xffff0000, FMT_D9, {IMM32_HIGH8, RN02}}, /* end-sanitize-am33 */ { "asr", 0xf8c801, 0xfffcff, FMT_D1, {DN0}}, @@ -922,7 +922,7 @@ const struct mn10300_opcode mn10300_opcodes[] = { /* start-sanitize-am33 */ { "lsr", 0xf95900, 0xffff00, FMT_D6, {RM2, RN0}}, { "lsr", 0xfb590000, 0xffff0000, FMT_D7, {IMM8, RN02}}, -{ "lsr", 0xfd590000, 0xfffc0000, FMT_D8, {IMM24, RN02}}, +{ "lsr", 0xfd590000, 0xffff0000, FMT_D8, {IMM24, RN02}}, { "lsr", 0xfe590000, 0xffff0000, FMT_D9, {IMM32_HIGH8, RN02}}, /* end-sanitize-am33 */ { "lsr", 0xf8c401, 0xfffcff, FMT_D1, {DN0}}, @@ -938,7 +938,7 @@ const struct mn10300_opcode mn10300_opcodes[] = { /* start-sanitize-am33 */ { "asl", 0xf96900, 0xffff00, FMT_D6, {RM2, RN0}}, { "asl", 0xfb690000, 0xffff0000, FMT_D7, {SIMM8, RN02}}, -{ "asl", 0xfd690000, 0xfffc0000, FMT_D8, {IMM24, RN02}}, +{ "asl", 0xfd690000, 0xffff0000, FMT_D8, {IMM24, RN02}}, { "asl", 0xfe690000, 0xffff0000, FMT_D9, {IMM32_HIGH8, RN02}}, /* end-sanitize-am33 */ { "asl", 0xf8c001, 0xfffcff, FMT_D1, {DN0}}, |