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author | Nick Clifton <nickc@redhat.com> | 2016-04-13 15:09:25 +0100 |
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committer | Nick Clifton <nickc@redhat.com> | 2016-04-13 15:09:25 +0100 |
commit | accc018020dd329d99b50335ad168d35650b7f09 (patch) | |
tree | c0ee440aa0eaccf620b4950393e8270e254a28a4 /opcodes | |
parent | 45e3745ed0e034fdec5beee0738f383bd6e2e045 (diff) | |
download | gdb-accc018020dd329d99b50335ad168d35650b7f09.zip gdb-accc018020dd329d99b50335ad168d35650b7f09.tar.gz gdb-accc018020dd329d99b50335ad168d35650b7f09.tar.bz2 |
Fix disassembly of the V850's LD.BU instruction.
PR target/19937
opcode * v850-opc.c (v850_opcodes): Correct masks for long versions of
the LD.B and LD.BU instructions.
gas * testsuite/gas/v850/pr19937.s: New test.
* testsuite/gas/v850/pr19937.d: New test control file.
* testsuite/gas/v850/basic.exp: Run the new test.
Diffstat (limited to 'opcodes')
-rw-r--r-- | opcodes/ChangeLog | 6 | ||||
-rw-r--r-- | opcodes/v850-opc.c | 4 |
2 files changed, 8 insertions, 2 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 04b4976..a426055 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,9 @@ +2016-04-13 Nick Clifton <nickc@redhat.com> + + PR target/19937 + * v850-opc.c (v850_opcodes): Correct masks for long versions of + the LD.B and LD.BU instructions. + 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com> * arc-dis.c (find_format): Check for extension flags. diff --git a/opcodes/v850-opc.c b/opcodes/v850-opc.c index 473a9ef..d5e54a5 100644 --- a/opcodes/v850-opc.c +++ b/opcodes/v850-opc.c @@ -1578,11 +1578,11 @@ const struct v850_opcode v850_opcodes[] = { "ldacc", two (0x07e0, 0x0bc4), two (0x07e0, 0xffff), {R1, R2}, 0, PROCESSOR_V850E2_UP | PROCESSOR_OPTION_EXTENSION }, { "ld.b", two (0x0700, 0x0000), two (0x07e0, 0x0000), {D16, R1, R2}, 2, PROCESSOR_ALL }, -{ "ld.b", two (0x0780, 0x0005), two (0x07e0, 0x000f), {D23, R1, R3}, 2, PROCESSOR_V850E2_UP }, +{ "ld.b", two (0x0780, 0x0005), two (0xffe0, 0x000f), {D23, R1, R3}, 2, PROCESSOR_V850E2_UP }, { "ld.b23", two (0x0780, 0x0005), two (0x07e0, 0x000f), {D23, R1, R3}, 2, PROCESSOR_V850E2_UP | PROCESSOR_OPTION_ALIAS }, { "ld.bu", two (0x0780, 0x0001), two (0x07c0, 0x0001), {D16_16, R1, R2_NOTR0}, 2, PROCESSOR_NOT_V850 }, -{ "ld.bu", two (0x07a0, 0x0005), two (0x07e0, 0x000f), {D23, R1, R3}, 2, PROCESSOR_V850E2_UP }, +{ "ld.bu", two (0x07a0, 0x0005), two (0xffe0, 0x000f), {D23, R1, R3}, 2, PROCESSOR_V850E2_UP }, { "ld.bu23", two (0x07a0, 0x0005), two (0x07e0, 0x000f), {D23, R1, R3}, 2, PROCESSOR_V850E2_UP | PROCESSOR_OPTION_ALIAS }, { "ld.dw", two (0x07a0, 0x0009), two (0xffe0, 0x001f), {D23_ALIGN1, R1, R3_EVEN}, 2, PROCESSOR_V850E3V5_UP }, |