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author | Andrew Burgess <andrew.burgess@embecosm.com> | 2016-03-24 17:18:41 +0000 |
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committer | Andrew Burgess <andrew.burgess@embecosm.com> | 2016-03-31 14:06:46 +0100 |
commit | 2cce10e71897b8b985c786c6c323922321408b39 (patch) | |
tree | eb915fdfc18cdc23d7a040422912ffd155f3cf85 /opcodes | |
parent | e7ea3ec7c623be0b9be1eaf4929794652a84be11 (diff) | |
download | gdb-2cce10e71897b8b985c786c6c323922321408b39.zip gdb-2cce10e71897b8b985c786c6c323922321408b39.tar.gz gdb-2cce10e71897b8b985c786c6c323922321408b39.tar.bz2 |
opcodes/arc/nps: Fix some operand flags
Some operands accidentally had the ARC_OPERAND_NCHK flag (due to copy &
paste mistake), meaning the operand value was skipping the overflow
check before being inserted. This commit removes the unwanted flags.
opcodes/ChangeLog:
* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
NPS_R_SRC1.
Diffstat (limited to 'opcodes')
-rw-r--r-- | opcodes/ChangeLog | 5 | ||||
-rw-r--r-- | opcodes/arc-opc.c | 4 |
2 files changed, 7 insertions, 2 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 59b4941..f916604 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2016-03-24 Andrew Burgess <andrew.burgess@embecosm.com> + + * arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and + NPS_R_SRC1. + 2016-03-30 Andrew Burgess <andrew.burgess@embecosm.com> * arc-nps400-tbl.h: Add a header comment, and fix some whitespace diff --git a/opcodes/arc-opc.c b/opcodes/arc-opc.c index 24d6f6b..231ef4b 100644 --- a/opcodes/arc-opc.c +++ b/opcodes/arc-opc.c @@ -1311,10 +1311,10 @@ const struct arc_operand arc_operands[] = { 3, 21, 0, ARC_OPERAND_IR | ARC_OPERAND_NCHK, insert_nps_3bit_src2, extract_nps_3bit_src2 }, #define NPS_R_DST (NPS_R_SRC2_3B + 1) - { 6, 21, 0, ARC_OPERAND_IR | ARC_OPERAND_NCHK, NULL, NULL }, + { 6, 21, 0, ARC_OPERAND_IR, NULL, NULL }, #define NPS_R_SRC1 (NPS_R_DST + 1) - { 6, 21, 0, ARC_OPERAND_IR | ARC_OPERAND_DUPLICATE | ARC_OPERAND_NCHK, NULL, NULL }, + { 6, 21, 0, ARC_OPERAND_IR | ARC_OPERAND_DUPLICATE, NULL, NULL }, #define NPS_BITOP_DST_POS (NPS_R_SRC1 + 1) { 5, 5, 0, ARC_OPERAND_UNSIGNED, 0, 0 }, |