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author | Maciej W. Rozycki <macro@imgtec.com> | 2017-06-30 07:21:56 +0100 |
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committer | Maciej W. Rozycki <macro@imgtec.com> | 2017-06-30 07:21:56 +0100 |
commit | 4151f6842850876e93c8e5d870d7c9147065788d (patch) | |
tree | 5b71209c6e01480d12ceb775f706fc5b78dc1c1e /opcodes | |
parent | 909b4e3d5fb8579b3721651c9e64a11e7ec27e5f (diff) | |
download | gdb-4151f6842850876e93c8e5d870d7c9147065788d.zip gdb-4151f6842850876e93c8e5d870d7c9147065788d.tar.gz gdb-4151f6842850876e93c8e5d870d7c9147065788d.tar.bz2 |
MIPS: Add Imagination interAptiv MR2 MIPS32r3 processor support (ChangeLog)
Correct ChangeLog entry for commit 38bf472a1521 ("MIPS: Add Imagination
interAptiv MR2 MIPS32r3 processor support").
Diffstat (limited to 'opcodes')
-rw-r--r-- | opcodes/ChangeLog | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 81c94e4..f3c0c62 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -56,7 +56,7 @@ 2017-06-28 Maciej W. Rozycki <macro@imgtec.com> Matthew Fortune <matthew.fortune@imgtec.com> - Andrew Bennett <andrew.bennett@imgtec.com> + Andrew Bennett <andrew.bennett@imgtec.com> * mips-formats.h (INT_BIAS): New macro. (INT_ADJ): Redefine in INT_BIAS terms. |